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ES9027QPRO Datasheet(PDF) 39 Page - ESS Technology,Inc |
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ES9027QPRO Datasheet(HTML) 39 Page - ESS Technology,Inc |
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39 / 89 page ![]() ES9027PRO Datasheet VERSION 0.4.1 39 ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-8800 • WWW.ESSTECH.COM Register Listings Some reserved registers values might be asserted in default mode. This is normal and does not need to be changed. System Registers Register 0: SYSTEM CONFIG Bits [7] [6] [5:4] [3] [2] [1] [0] Default 1'b0 1'b0 2'b00 1'b0 1'b0 1'b0 1'b0 Bits Mnemonic Description [7] SOFT_RESET Performs soft reset to digital core [6] ENABLE_64FS_MODE Enables 64FS mode for 768kHz sample rate. • 1'b0: 64FS mode disabled (default) • 1'b1: 64FS mode enabled [5:4] CH78_SEL Selects ch7/8 nsmod input. • 2'b00: Input from ch7/8 interpolation path (default) • 2'b01: Input from ch5/6 interpolation path • 2'b10: Input from ch1/2 interpolation path • 2'b11: Reserved [3] CH56_SEL Selects ch5/6 nsmod input. • 1'b0: Input from ch5/6 interpolation path (default) • 1'b1: Input from ch1/2 interpolation path [2] CH34_SEL Selects ch3/4 nsmod input. • 1'b0: Input from ch3/4 interpolation path (default) • 1'b1: Input from ch1/2 interpolation path [1] DAC_MODE_REG Enables DAC data path • 1'b0: DAC disabled • 1'b1: DAC enabled [0] RESERVED NA |
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