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VP5311C/CG/GP1N Datasheet(PDF) 13 Page - Zarlink Semiconductor Inc

Part # VP5311C/CG/GP1N
Description  NTSC/PAL Digital Video Encoder
PDF  19 Pages
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Manufacturer  ZARLINK [Zarlink Semiconductor Inc]
Direct Link  http://www.zarlink.com
Logo ZARLINK - Zarlink Semiconductor Inc

VP5311C/CG/GP1N Datasheet(HTML) 13 Page - Zarlink Semiconductor Inc

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VP5311C/VP5511C
12
TIMING INFORMATION
Min.
Typ.
10
14.5
10
5
10
0
10
0
9
27.0
Max.
TBD
TBD
25
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
PXCX
periods
ns
fPXCK
tPWH; PXCK
tPWL; PXCK
tRP
tFP
tSU;PD
tHD;PD
tSU;SCSYNC
tHD;SCSYNC
tSU;PALID
tHD;PALID
tDUR;PALID
tDOS
10% to 90% points
90% to 10% points
PXCK to COMPSYNC
PXCK to CLAMP
Conditions
Parameters
Master clock frequency (PXCK input)
PXCX pulse width, HIGH
PXCX pulse width, LOW
PXCX rise time
PXCX fall time
PD7-0 set up time
PD7-0 hold time
SCSYNC set up time
SCSYNC hold time
PALID set up time
PALID hold time
PALID duration
Output delay
Symbol
Note: Timing reference points are at the 50% level. Digital C LOAD <40pF.
Fig.6 PALID input timing
1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450
Y719 $FF
$00
$XY
$00
EAV SEQUENCE
ANCILLARY DATA...
Pixel Data Input (PD[7,0])
Sample Number
PALID Stable
Input (PALID)
PXCK Input (27MHz)
t PWH; PXCK
t PWL; PXCK
t SU; PD
t HD; PD
t HD; PALID
t SU; PALID
t DUR; PALID



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