CC2550-RTR1 datasheet(38/55 Pages) TI

38 / 55 page

CC2550

PRELIMINARY Data Sheet (Rev.1.2)

SWRS039A

Page 38 of 54

27.1

Configuration Register Details

0x01: IOCFG1 – GDO1 output pin configuration

Bit

Field Name

Reset

R/W

Description

GDO_DS

R/W

Set high (1) or low (0) output drive strength on the

GDO pins.

GDO1

_INV

R/W

Invert output, i.e. select active low / high

5:0

GDO1

_CFG[5:0]

46 (0x2E)

R/W

Default is 3-state (see Table 22 on page 31)

0x02: IOCFG0 – GDO0 output pin configuration

Bit

Field Name

Reset

R/W

Description

TEMP_SENSOR_ENABLE

R/W

Enable analog temperature sensor. Write 0 in all

other register bits when using temperature sensor.

GDO0

_INV

R/W

Invert output, i.e. select active low / high

5:0

GDO0

_CFG[5:0]

63 (0x3F)

R/W

Default is CLK_XOSC/192 (see Table 22 on page

31)

0x03: FIFOTHR – FIFO threshold

Bit

Field Name

Reset

R/W

Description

7:4

Reserved

0 (0000)

R/W

Write 0 (0000) for compatibility with possible future

extensions.

3:0

FIFO_THR[3:0]

7 (0111)

R/W

Set the threshold for the TX FIFO. The threshold is

exceeded when the number of bytes in the FIFO is equal to

or higher than the threshold value.

Setting

Bytes in TX FIFO

0 (0000)

1 (0001)

2 (0010)

3 (0011)

4 (0100)

5 (0101)

6 (0110)

7 (0111)

8 (1000)

9 (1001)

10 (1010)

11 (1011)

12 (1100)

13 (1101)

14 (1110)

15 (1111)

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