AT43USB320A datasheet(21/115 Pages) ATMEL

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AT43USB320A

1443E–USB–4/04

The most typical and general program setup for the Reset and Interrupt Vector Addresses are:

USB related interrupt events are routed to reset vectors 13 and 2 through a separate set of

interrupt, interrupt enable and interrupt mask registers that are mapped to the data SRAM

space. These interrupts must be enabled though their control register bits. In the event an

interrupt is generated, the source of the interrupt is identified by reading the interrupt registers.

The USB frame and transaction related interrupt events, such as Start of Frame interrupt, are

grouped in one set of registers: USB Interrupt Flag Register and USB Interrupt Enable Regis-

ter. The USB Bus reset and suspend/resume are grouped in another set of registers:

Suspend/Resume Register and Suspend/Resume Interrupt Enable Register.

Address

Labels

Code

Comments

$000

jmp

RESET

; Reset Handler

$004

jmp

EXT_INT1

; IRQ1 Handler

$00E

jmp

TIM0_OVF

; Timer0 Overflow

Handler

$018

jmp

USB_HW

; USB Handler

;

$00d

MAIN:

ldi r16, high (RAMEND)

; Main Program

start

$00e

out SPH, r16

$00f

ldi r16, low (RAMEND)

$010

out SPL, r16

$011

<instr> xxx

...

AT43USB320A Datasheet(PDF) 21 Page - ATMEL Corporation

AT43USB320A Datasheet(HTML) 21 Page - ATMEL Corporation

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