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AT45DB081D Datasheet(PDF) 21 Page - ATMEL Corporation |
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AT45DB081D Datasheet(HTML) 21 Page - ATMEL Corporation |
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21 / 53 page ![]() 21 3596E–DFLASH–02/07 AT45DB081D 10.2.2 Reading the Security Register The Security Register can be read by first asserting the CS pin and then clocking in an opcode of 77H followed by three dummy bytes. After the last don’t care bit has been clocked in, the con- tent of the Security Register can be clocked out on the SO pin. After the last byte of the Security Register has been read, additional pulses on the SCK pin will simply result in undefined data being output on the SO pins. Deasserting the CS pin will terminate the Read Security Register operation and put the SO pin into a high-impedance state. Figure 10-4. Read Security Register Opcode X X X Data Byte n Data Byte n + 1 CS Data Byte n + x Each transition represents 8 bits SI SO |
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