AT89C51CC03U-RDTIM datasheet(107/197 Pages) ATMEL

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107

AT89C51CC03

4182K–CAN–05/06

Registers

Table 48. CANGCON Register

CANGCON (S:ABh)

CAN General Control Register

Reset Value = 0000 0x00b

ABRQ

OVRQ

TTC

SYNCTTC

AUTOBAUD

TEST

ENA

GRES

Bit

Number

Bit Mnemonic Description

7ABRQ

Abort Request

Not an auto-resetable bit. A reset of the ENCH bit (message object control

and DLC register) is done for each message object. The pending transmission

communications are immediately aborted but the on-going communication will

be terminated normally, setting the appropriate status flags, TXOK or RXOK.

6OVRQ

Overload frame request (initiator)

Auto-resetable bit.

Set to send an overload frame after the next received message.

Cleared by the hardware at the beginning of transmission of the overload

frame.

5TTC

Network in Timer Trigger Communication

set to select node in TTC.

clear to disable TTC features.

SYNCTTC

Synchronization of TTC

When this bit is set the TTC timer is caught on the last bit of the End Of

Frame.

When this bit is clear the TTC timer is caught on the Start Of Frame.

This bit is only used in the TTC mode.

3AUTOBAUD

AUTOBAUD

Set to activate listening mode.

Clear to disable listening mode

2TEST

Test mode. The test mode is intended for factory testing and not for customer

use.

1ENA/STB

Enable/Standby CAN Controller

When this bit is set, it enables the CAN controller and its input clock.

When this bit is clear, the on-going communication is terminated normally and

the CAN controller state of the machine is frozen (the ENCH bit of each

message object does not change).

In the standby mode, the transmitter constantly provides a recessive level; the

receiver is not activated and the input clock is stopped in the CAN controller.

During the disable mode, the registers and the mailbox remain accessible.

Note that two clock periods are needed to start the CAN controller state of the

machine.

0GRES

General Reset (software reset)

Auto-resetable bit. This reset command is ‘ORed’ with the hardware reset in

order to reset the controller. After a reset, the controller is disabled.

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