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4779L–ISM–09/06

ATR2406

7.7

Control Signals

The various transceiver functions are activated by the following control signals. A timing pro-

posal is shown in Figure 7-3 on page 14

7.8

Serial Programming Bus

The transceiver is programmed by the SPI (CLOCK, DATA and ENABLE).

After setting the enable signal to low, the data is transferred bit by bit into the shift register on

the rising edge of the clock signal, starting with the MSBit. When the enable signal has

returned to high, the programmed information is active. Additional leading bits are ignored and

there is no check made of how many clock pulses arrived during enable low.

The programming of the transceiver is done by a 16-bit or 25-bit data word (for the RX clock

recovery mode).

7.9

3-wire Bus Timing

Figure 7-2.

3-wire Bus Protocol Timing Diagram

Table 7-7.

Control Signals and Functions

Signal

Functions

PU_REG

Activates AUX voltage regulator and the VCO voltage regulator supplying the

complete transceiver

PU_TRX

Activates RX/TX blocks

RX_ON

Activates RX circuits: DEMOD, IF AMP, IR MIXER

TX_ON

Activates TX circuits: PA, RAMP GEN, Starts RAMP SIGNAL at RAMP_OUT

nOLE

Disables open loop mode of the PLL

DATA

CLOCK

ENABLE

TT

TEC

TS

TC

TH

TL

TPER

Table 7-8.

3-wire Bus Protocol Table

Description

Symbol

Minimum Value

Unit

Clock period

TPER

100

ns

Set time data to clock

TS

20

ns

Hold time data to clock

TH

20

ns

Clock pulse width

TC

60

ns

Set time enable to clock

TL

100

ns

Hold time enable to data

TEC

0

ns

Time between two protocols

TT

250

ns