USB3280 datasheet(37/42 Pages) SMSC

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Hi-Speed USB Device PHY with UTMI Interface

Datasheet

SMSC USB3280

Revision 1.2 (10-27-06)

DATASHEET

To detect the assertion of the downstream Chirp K's and Chirp J's for 2.5us {TFILT}, the SIE must see

the appropriate LINESTATE signals asserted continuously for 165 CLKOUT cycles.

Figure 8.6 HS Detection Handshake Timing Behavior from Suspend

Table 8.8 HS Detection Handshake Timing Values from Suspend

TIMING

PARAMETER

DESCRIPTION

VALUE

While in suspend state an SE0 is detected on the USB. HS

Handshake begins. D+ pull-up enabled, HS terminations

disabled, SUSPENDN negated.

0 (HS Reset T0)

First transition of CLKOUT. CLKOUT "Usable" (frequency

accurate to ±10%, duty cycle accurate to 50±5).

T0 < T1 < T0 + 5.6ms

Device asserts Chirp K on the bus.

T1 < T2 < T0 + 5.8ms

Device removes Chirp K from the bus. (1 ms minimum width)

and begins looking for host chirps.

T2 + 1.0 ms < T3 <

T0 + 7.0 ms

CLK "Nominal" (CLKOUT is frequency accurate to ±500

ppm, duty cycle accurate to 50±5).

T1 < T3 < T0 + 20.0ms

CLK60

Look for host chirps

Device Chirp K

SUSPENDN

DP/DM

TERMSELECT

TXVALID

SE0

CLK power up time

XCVRSELECT

OPMODE 1

OPMODE 0

time

USB3280 Datasheet(PDF) 37 Page - SMSC Corporation

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