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HIP6004ACB Datasheet(PDF) 7 Page - Intersil Corporation

Part # HIP6004ACB
Description  Buck and Synchronous-Rectifier (PWM) Controller and Output Voltage Monitor
PDF  13 Pages
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

HIP6004ACB Datasheet(HTML) 7 Page - Intersil Corporation

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7
For an equation for the ripple current see the section under component guidelines titled ‘Output Inductor Selection’
.
A small ceramic capacitor should be placed in parallel with
ROCSET to smooth the voltage across ROCSET in the
presence of switching noise on the input voltage.
Output Voltage Program
The output voltage of a HIP6004A converter is
programmed to discrete levels between 1.8VDC and
3.5VDC . The voltage identification (VID) pins program an
internal voltage reference (DACOUT) with a TTL-
compatible 5-bit digital-to-analog converter (DAC). The
level of DACOUT also sets the PGOOD and OVP
thresholds. Table 1 specifies the DACOUT voltage for the
32 different combinations of connections on the VID pins.
The output voltage should not be adjusted while the
converter is delivering power. Remove input power before
changing the output voltage. Adjusting the output voltage
during operation could toggle the PGOOD signal and
exercise the overvoltage protection.
All VID pin combinations resulting in a 0V output setting
activate the Power-On Reset function, disable the gate drive
circuitry and output a 0 logic at PGOOD pin.
Application Guidelines
Layout Considerations
As in any high frequency switching converter, layout is very
important. Switching current from one power device to
another can generate voltage transients across the
impedances of the interconnecting bond wires and circuit
traces. These interconnecting impedances should be
minimized by using wide, short printed circuit traces. The
critical components should be located as close together as
possible, using ground plane construction or single point
grounding.
Figure 5 shows the critical power components of the
converter. To minimize the voltage overshoot the
interconnecting wires indicated by heavy lines should be part
of ground or power plane in a printed circuit board. The
TABLE 1. OUTPUT VOLTAGE PROGRAM
PIN NAME
NOMINAL OUTPUT
VOLTAGE DACOUT
PIN NAME
NOMINAL OUTPUT
VOLTAGE DACOUT
VID4
VID3
VID2
VID1
VID0
VID4
VID3
VID2
VID1
VID0
011
11
0
111
11
0
011
10
0
111
10
2.1
011
01
0
111
01
2.2
011
00
0
111
00
2.3
010
11
0
110
11
2.4
010
10
0
110
10
2.5
010
01
0
110
01
2.6
010
00
0
110
00
2.7
001
11
0
101
11
2.8
001
10
0
101
10
2.9
001
01
1.80
101
01
3.0
001
00
1.85
101
00
3.1
000
11
1.90
100
11
3.2
000
10
1.95
100
10
3.3
000
01
2.00
100
01
3.4
000
00
2.05
100
00
3.5
NOTE: 0 = connected to GND or VSS, 1 = connected to VDD through pull-up resistors.
PGND
LO
CO
LGATE
UGATE
PHASE
Q1
Q2
D2
VIN
VOUT
RETURN
HIP6004A
CIN
FIGURE 5. PRINTED CIRCUIT BOARD POWER AND
GROUND PLANES OR ISLANDS
HIP6004A



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