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DP83848C Datasheet(PDF) 1 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # DP83848C
Description  PHYTER짰 - Commercial Temperature Single Port 10/100 Mb/s Ethernet Physical Layer Transceiver
PDF  82 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

DP83848C Datasheet(HTML) 1 Page - National Semiconductor (TI)

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© 2007 National Semiconductor Corporation
www.national.com
1
Febuary 2007
DP83848C PHYTER
® - Commercial Temperature
Single Port 10/100 Mb/s Ethernet Physical Layer Transceiver
General Description
The DP83848C is a robust fully featured 10/100 single
port Physical Layer device offering low power con-
sumption, including several intelligent power down
states. These low power modes increase overall prod-
uct reliability due to decreased power dissipation. Sup-
porting multiple intelligent power modes allows the
application to use the absolute minimum amount of
power needed for operation.
The DP83848C includes a 25MHz clock out. This
means that the application can be designed with a
minimum of external parts, which in turn results in the
lowest possible total cost of the solution.
The DP83848C easily interfaces to twisted pair media
via an external transformer. Both MII and RMII are
supported ensuring ease and flexibility of design.
The DP83848C features integrated sublayers to sup-
port both 10BASE-T and 100BASE-TX Ethernet proto-
cols, which ensures compatibility and interoperability
with all other standards based Ethernet solutions.
The DP83848C is offered in a small form factor (48 pin
LQFP) so that a minimum of board space is needed.
Applications
•
High End Peripheral Devices
•
Industrial Controls and Factory Automation
•
General Embedded Applications
System Diagram
PHYTER
®
is a registered trademark of National Semiconductor.
Status
10BASE-T
or
100BASE-TX
MII/RMII/SNI
25 MHz
Clock
LEDs
DP83848C
10/100 Mb/s
MPU/CPU
Source
Typical Application
Features
•
Low-power 3.3V, 0.18
µm CMOS technology
•
Low power consumption < 270mW Typical
•
3.3V MAC Interface
•
Auto-MDIX for 10/100 Mb/s
•
Energy Detection Mode
•
25 MHz clock out
•
SNI Interface (configurable)
•
RMII Rev. 1.2 Interface (configurable)
•
MII Serial Management Interface (MDC and MDIO)
•
IEEE 802.3u MII
•
IEEE 802.3u Auto-Negotiation and Parallel Detection
•
IEEE 802.3u ENDEC, 10BASE-T transceivers and filters
•
IEEE 802.3u PCS, 100BASE-TX transceivers and filters
•
Integrated ANSI X3.263 compliant TP-PMD physical sub-
layer with adaptive equalization and Baseline Wander com-
pensation
•
Error-free Operation up to 137 meters
•
Programmable LED support Link, 10 /100 Mb/s Mode, Activ-
ity, and Collision Detect
•
Single register access for complete PHY status
•
10/100 Mb/s packet BIST (Built in Self Test)
•
48-pin LQFP package (7mm) x (7mm)


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