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13192 Datasheet(PDF) 15 Page - Freescale Semiconductor, Inc |
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13192 Datasheet(HTML) 15 Page - Freescale Semiconductor, Inc |
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15 / 24 page ![]() Pin Connections MC13192 Technical Data, Rev. 3.2 Freescale Semiconductor 15 20 IRQ Digital Output Active Low Interrupt Request. Open drain device. Programmable 40 kΩ internal pull-up. Interrupt can be serviced every 6 µs with <20 pF load. Optional external pull-up must be >4 kΩ. 21 VDDD Power Output Digital regulated supply bypass. Decouple to ground. 22 VDDINT Power Input Digital interface supply & digital regulator input. Connect to Battery. 2.0 to 3.4 V. Decouple to ground. 23 GPIO51 Digital Input/Output General Purpose Input/Output 5. See Footnote 1 24 GPIO61 Digital Input/Output General Purpose Input/Output 6. See Footnote 1 25 GPIO71 Digital Input/Output General Purpose Input/Output 7. See Footnote 1 26 XTAL1 Input Crystal Reference oscillator input. Connect to 16 MHz crystal and load capacitor. 27 XTAL2 Input/Output Crystal Reference oscillator output Note: Do not load this pin by using it as a 16 MHz source. Measure 16 MHz output at Pin 15, CLKO, programmed for 16 MHz. See the MC13192 Reference Manual for details. Connect to 16 MHz crystal and load capacitor. 28 VDDLO2 Power Input LO2 VDD supply. Connect to VDDA externally. 29 VDDLO1 Power Input LO1 VDD supply. Connect to VDDA externally. 30 VDDVCO Power Output VCO regulated supply bypass. Decouple to ground. 31 VBATT Power Input Analog voltage regulators Input. Connect to Battery. Decouple to ground. 32 VDDA Power Output Analog regulated supply Output. Connect to directly VDDLO1 and VDDLO2 externally and to PAO± through a frequency trap. Note: Do not use this pin to supply circuitry external to the chip. Decouple to ground. EP Ground External paddle / flag ground. Connect to ground. 1 The transceiver GPIO pins default to inputs at reset. There are no programmable pullups on these pins. Unused GPIO pins should be tied to ground if left as inputs, or if left unconnected, they should be programmed as outputs set to the low state. 2 During low power modes, input must remain driven by MCU. 3 By default MISO is tri-stated when CE is negated. For low power operation, miso_hiz_en (Bit 11, Register 07) should be set to zero so that MISO is driven low when CE is negated. Table 8. Pin Function Description (continued) Pin # Pin Name Type Description Functionality |
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