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4LS15K Datasheet(PDF) 68 Page - OSRAM GmbH |
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4LS15K Datasheet(HTML) 68 Page - OSRAM GmbH |
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68 / 115 page  Document Feedback 4LS Register Description Datasheet • PUBLIC DS000542 • v3-01 • 2022-Nov-17 114 │ 67 Bit 5 Bit 4 CVC Bias Current [µA] 1 1 10 Figure 106: CDS Bias Current Programmed by Register Bit 3 Bit 2 CDS Bias Current [µA] 0 0 5 0 1 10 1 0 15 1 1 20 Figure 107: VREF Trimming Current Programmed by Register Bit 1 Bit 0 Current [µA] Voltage [V] 0 0 60 1.6 0 1 67.5 1.8 1 0 75 2 1 1 82.5 2.2 9.1.13 Programmable LVDS Register (Address 0x0C) Figure 108: PLVDReg Address: 0x0C Default Value: 0x8D Access: Read/Write Bit Bit Name Default Bit Description 7:5 Bandgap Trimming 100b It defines the bandgap tuning due to devices production variations. 4:2 LVDS Bias 011b It defines the LVDS driver bias current multiplier. 1:0 VRST Special Trimming 01b Internal Debug Purposes Use default value. |
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