1999 May 27

2

Philips Semiconductors

Preliminary specification

NPN resistor-equipped transistor

PDTC144EEF

FEATURES

• Built-in bias resistors R1 and R2

(typ. 47 k

Ω each)

• Simplification of circuit design

• Reduces number of components

and board space.

APPLICATIONS

• Especially suitable for space

reduction in interface and driver

circuits

• Inverter circuit configurations

without use of external resistors.

DESCRIPTION

NPN resistor-equipped transistor in

an SC-89 (SOT490) plastic package.

PINNING

PIN

DESCRIPTION

1

base/input

2

emitter/ground

3

collector/output

Fig.1 Simplified outline (SC-89; SOT490) and symbol.

handbook, halfpage

MAM412

1

2

3

R1

R2

12

Top view

3

Fig.2

Equivalent inverter

symbol.

MGA893 - 1

1

3

2

MARKING

TYPE

NUMBER

MARKING

CODE

PDTC144EEF

08

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

Note

1. Refer to SC-89 (SOT490) standard mounting conditions.

SYMBOL

PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

collector-base voltage

open emitter

−

50

V

collector-emitter voltage

open base

−

50

V

emitter-base voltage

open collector

−

10

V

input voltage

positive

−

+40

V

negative

−−10

V

output current (DC)

−

100

mA

peak collector current

−

100

mA

total power dissipation

−

250

mW

storage temperature

−65

+150

°C

junction temperature

−

150

°C

operating ambient temperature

−65

+150

°C