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CS42435-DMZ Datasheet(PDF) 41 Page - Cirrus Logic |
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CS42435-DMZ Datasheet(HTML) 41 Page - Cirrus Logic |
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41 / 58 page ![]() DS685F1 41 CS42435 7.3 Power Control (Address 02h) 7.3.1 Power Down ADC Pairs (PDN_ADCX) Default = 0 0 - Disable 1 - Enable Function: When enabled, the respective ADC channel pair (ADC1 - AIN1/AIN2; and ADC2 - AIN3/AIN4) will remain in a reset state. 7.3.2 Power Down DAC Pairs (PDN_DACX) Default = 0 0 - Disable 1 - Enable Function: When enabled, the respective DAC channel pair (DAC1 - AOUT1/AOUT2; DAC2 - AOUT3/AOUT4; DAC3 - AOUT5/AOUT6; and DAC4 - AOUT7/AOUT8) will remain in a reset state. It is advised that any change of these bits be made while the DACs are muted or the power down bit (PDN) is enabled to eliminate the possibility of audible artifacts. 7.3.3 Power Down (PDN) Default = 0 0 - Disable 1 - Enable Function: The entire device will enter a low-power state when this function is enabled. The contents of the control registers are retained in this mode. 7 6 5 432 10 Reserved PDN_ADC2 PDN_ADC1 PDN_DAC4 PDN_DAC3 PDN_DAC2 PDN_DAC1 PDN |
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