DSP56366P datasheet(53/110 Pages) FREESCALE

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DSP56366 Technical Data, Rev. 3.1

Freescale Semiconductor

3-27

191

RD assertion to RAS deassertion

tROH

4.5

× T

C − 4.0

221.0

—

146.0

—

192

RD assertion to data valid

tGA

× T

C − 7.5

—

192.5

—

125.8

193

RD deassertion to data not valid3

tGZ

0.0

—

0.0

—

194

WR assertion to data active

0.75

× T

C − 0.3

37.2

—

24.7

—

195

WR deassertion to data high impedance

0.25

× T

—

12.5

—

8.3

1 The number of wait states for out of page access is specified in the DCR.

2 The refresh period is specified in the DCR.

3 RD deassertion will always occur after CAS deassertion; therefore, the restricted timing is t

OFF and not tGZ.

4 Reduced DSP clock speed allows use of DRAM out-of-page access with four Wait states (See

Figure 3-17.).

Table 3-14 DRAM Out-of-Page and Refresh Timings, Eight Wait States1, 2

No.

Characteristics3

Symbol

Expression4

66 MHz

80 MHz

Unit

Min

Max

Min

Max

157 Random read or write cycle time

tRC

× T

136.4

—

112.5

—

158 RAS assertion to data valid (read)

tRAC

4.75

× T

C − 7.5

4.75

× T

C − 6.5

—

64.5

—

52.9

159 CAS assertion to data valid (read)

tCAC

2.25

× T

C − 7.5

2.25

× T

C − 6.5

—

26.6

—

21.6

160 Column address valid to data valid (read)

tAA

× T

C − 7.5

× T

C − 6.5

—

40.0

—

31.0

161 CAS deassertion to data not valid (read hold

time)

tOFF

0.0

—

0.0

—

162 RAS deassertion to RAS assertion

tRP

3.25

× T

C − 4.0

45.2

—

36.6

—

163 RAS assertion pulse width

tRAS

5.75

× T

C − 4.0

83.1

—

67.9

—

164 CAS assertion to RAS deassertion

tRSH

3.25

× T

C − 4.0

45.2

—

36.6

—

165 RAS assertion to CAS deassertion

tCSH

4.75

× T

C − 4.0

68.0

—

55.5

—

166 CAS assertion pulse width

tCAS

2.25

× T

C − 4.0

30.1

—

24.1

—

167 RAS assertion to CAS assertion

tRCD

2.5

× T

C ± 2

35.9

39.9

29.3

33.3

168 RAS assertion to column address valid

tRAD

1.75

× T

C ± 2

24.5

28.5

19.9

23.9

Table 3-13 DRAM Out-of-Page and Refresh Timings, Four Wait States1, 2 (continued)

No.

Characteristics3

Symbol

Expression

20 MHz4

30 MHz4

Unit

Min

Max

Min

Max

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