6.4 Layout

6.4.1 Layout Guidelines

For accurate comparator applications it is important maintain a stable power supply with minimized noise and

glitches. Output rise and fall times are in the tens of nanoseconds, and should be treated as high speed logic

devices. The bypass capacitor should be as close to the supply pin as possible and connected to a solid ground

plane, and preferably directly between the VCC and GND pins.

Minimize coupling between outputs and inputs to prevent output oscillations. Do not run output and input traces

in parallel unless there is a VCC or GND trace between output to reduce coupling. When series resistance is

added to inputs, place resistor close to the device. A low value (<100 ohms) resistor may also be added in series

with the output to dampen any ringing or reflections on long, non-impedance controlled traces. For best edge

shapes, controlled impedance traces with back-terminations should be used when routing long distances.

6.4.2 Layout Example

VCC

Ground

6

5

7

1

2

3

4

8

Ground

PF

1IN-

1IN+

GND

2OUT

2IN-

2IN+

1OUT

VCC

OK

VCC or GND

Better

Input Resistors

Close to device

Figure 6-20. Dual Layout Example

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TLV1812-EP, TLV1822-EP

SNOSDJ3 – MAY 2024

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