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MC68HC908AS60AMFN Datasheet(PDF) 79 Page - Freescale Semiconductor, Inc |
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MC68HC908AS60AMFN Datasheet(HTML) 79 Page - Freescale Semiconductor, Inc |
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79 / 414 page ![]() EEPROM-1 Register Descriptions MC68HC908AZ60A • MC68HC908AS60A • MC68HC908AS60E Data Sheet, Rev. 6 Freescale Semiconductor 79 AUTO — Automatic Termination of Program/Erase Cycle When AUTO is set, EEPGM is cleared automatically after the program/erase cycle is terminated by the internal timer. (See note D for 6.4.5.2 EEPROM-1 Programming, 6.4.5.3 EEPROM-1 Erasing, and 28.1.13 EEPROM Memory Characteristics) 1 = Automatic clear of EEPGM is enabled 0 = Automatic clear of EEPGM is disabled EEPGM — EEPROM-1 Program/Erase Enable This read/write bit enables the internal charge pump and applies the programming/erasing voltage to the EEPROM-1 array if the EELAT bit is set and a write to a valid EEPROM-1 location has occurred. Reset clears the EEPGM bit. 1 = EEPROM-1 programming/erasing power switched on 0 = EEPROM-1 programming/erasing power switched off NOTE Writing logic 0s to both the EELAT and EEPGM bits with a single instruction will clear EEPGM only to allow time for the removal of high voltage. 6.5.2 EEPROM-1 Array Configuration Register The EEPROM-1 array configuration register configures EEPROM-1 security and EEPROM-1 block protection. This read-only register is loaded with the contents of the EEPROM-1 nonvolatile register (EE1NVR) after a reset. Bit 7:5 — Unused Bits These read/write bits are software programmable but have no functionality. EEPRTCT — EEPROM-1 Protection Bit The EEPRTCT bit is used to enable the security feature in the EEPROM (see EEPROM-1 Program/Erase Protection). 1 = EEPROM-1 security disabled 0 = EEPROM-1 security enabled This feature is a write-once feature. Once the protection is enabled it may not be disabled. Address: $FE1F Bit 7 6 5 4 3 2 1 Bit 0 Read: UNUSED UNUSED UNUSED EEPRTCT EEBP3 EEBP2 EEBP1 EEBP0 Write: Reset: Contents of EE1NVR ($FE1C) = Unimplemented Figure 6-3. EEPROM-1 Array Configuration Register (EE1ACR) |
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