34920 datasheet(21/29 Pages) FREESCALE

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Analog Integrated Circuit Device Data

Freescale Semiconductor

34920

FUNCTIONAL DESCRIPTION

FUNCTIONAL INTERNAL BLOCK DESCRIPTION

Figure 8. Simplified DC Application Diagram Showing 1 of 2 Motor Drive Circuits

BIPOLAR CURRENT REGULATED STEP MOTOR

DRIVE SYSTEM

The drive circuitry is powered by the VVB+ supply voltage.

For example, with external current sense resistors of 0.910

Ω

±1%, the drive circuitry provides drive for a bipolar step motor

at current levels of approximately 183 mA, 367 mA, and

550 mA. Current mode operation supports quarter stepping.

This drive enters the fast current decay mode when both

the CURR_I0_PHASEX and CURR_I1_PHASEX inputs are

set to the logic [1] level. In fast current decay mode, any

residual motor winding current is forced into the VVB+ supply

rail when going to a zero current state from a non-zero

current level. This forces the motor winding current toward

zero as quickly as possible.

For each of the two H-bridge drivers, controlled crossover

delay, a blanking period, and internal overtemperature

sensing are provided. The crossover delay is controlled to

provide sufficient time for cross-conduction suppression. At

no time will both the upper and lower output device on the

same side of the H-bridge be allowed to conduct

simultaneously. Also, following a turn-on event a blanking

period is included to prevent false turn-offs owing to the initial

turn-on current spike, which results from motor circuit

capacitance.

This drive has internal overtemperature sensing for

protection. During an overtemperature event, when the

device TJ is at or above TJ(SHUTDOWN), the internal thermal

protection circuit disables the drive outputs by driving all

outputs to the zero current state until the device temperatures

have dropped below the lower thermal threshold temperature

TJ(ENABLE), at which time the driver is re-enabled.

Note During power-on the step motor driver circuit inhibits

its outputs when VVB+ is at 4.0 V or greater until RESET is

released. Likewise, during power-down the step motor driver

circuit inhibits its outputs from the point when RESET goes

low until VVB+ has dropped below 4.0 V.

DR2_MODE

VB+

Phase A H-Bridge

Phase B H-Bridge

DR2_DIR_DCM

SDR2_CURR_I0 PHASEA

SDR2_CURR_I1 PHASEA

SDR2_DIR_PH A

DR2A1

DR2A2

DR2B2

SDR2_DIR_PH_B

SDR2_CURR_I1_PHASEB

SDR2_CURR_I0_PHASEB

DR2B1

DR2PWM

Motor

34920

DR2

34920 Datasheet(PDF) 21 Page - Freescale Semiconductor, Inc

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