MPC5200B datasheet(9/78 Pages) FREESCALE

9 / 78 page

Electrical and Thermal Characteristics

MPC5200B Data Sheet, Rev. 1

Freescale Semiconductor

3.1.4

Electrostatic Discharge

CAUTION

This device contains circuitry that protects against damage due to

high-static voltage or electrical fields. However, it is advised that normal

precautions be taken to avoid application of any voltages higher than

maximum-rated voltages. Operational reliability is enhanced if unused

inputs are tied to an appropriate logic voltage level (i.e., either GND or

VCC). Table 7 gives package thermal characteristics for this device.

3.1.5

Power Dissipation

Power dissipation of the MPC5200B is caused by 3 different components: the dissipation of the internal

or core digital logic (supplied by VDD_CORE), the dissipation of the analog circuitry (supplied by

SYS_PLL_AVDD and CORE_PLL_AVDD) and the dissipation of the IO logic (supplied by

VDD_IO_MEM and VDD_IO). Table 6 details typical measured core and analog power dissipation

figures for a range of operating modes. However, the dissipation due to the switching of the IO pins can

not be given in general, but must be calculated by the user for each application case using the following

formula:

Eqn. 1

where N is the number of output pins switching in a group M, C is the capacitance per pin, VDD_IO is the

IO voltage swing, f is the switching frequency and PIOint is the power consumed by the unloaded IO stage.

The total power consumption of the MPC5200B processor must not exceed the value, which would cause

the maximum junction temperature to be exceeded.

Eqn. 2

Table 5. ESD and Latch-Up Protection Characteristics

Sym

Rating

Min

Max

Unit

SpecID

VHBM

Human Body Model (HBM)—JEDEC JESD22-A114-B

2000

—

D4.1

VMM

Machine Model (MM)—JEDEC JESD22-A115

200

—

D4.2

VCDM

Charge Device Model (CDM)—JEDEC JESD22-C101

500

—

D4.3

ILAT

Latch-up Current at TA=85

positive

negative

+100

-100

—mA

D4.4

ILAT

Latch-up Current at TA=27

positive

negative

+200

-200

—mA

D4.5

IOint

∑

CVDD_IO

total

core

analog

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