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XRT83VSH28IB Datasheet(PDF) 56 Page - Exar Corporation

Part # XRT83VSH28IB
Description  8-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
PDF  74 Pages
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Manufacturer  EXAR [Exar Corporation]
Direct Link  http://www.exar.com
Logo EXAR - Exar Corporation

XRT83VSH28IB Datasheet(HTML) 56 Page - Exar Corporation

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XRT83VSH28
PRELIMINARY
53
8-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
REV. P1.0.0
D1
JABW
Jitter Bandwidth
The jitter bandwidth is a global setting that is applied to both the
receiver and transmitter jitter attenuator.
0 = 10Hz
1 = 1.5Hz
R/W
0
D0
FIFOS
FIFO Depth Select
The FIFO depth select is used to configure the part for a 32-bit or
64-bit FIFO (within the jitter attenuator blocks). The delay of the
FIFO is equal to ½ the FIFO depth. This is a global setting that is
applied to both the receiver and transmitter FIFO.
0 = 32-Bit
1 = 64-Bit
R/W
0
TABLE 21: MICROPROCESSOR REGISTER 0X02H BIT DESCRIPTION
CHANNEL 0-7 (0X02H-0X72H)
BIT
NAME
FUNCTION
Register
Type
Default
Value
(HW reset)
D7
INVQRSS
QRSS inversion
INVQRSS is used to invert the transmit QRSS pattern set by the
TxTEST[2:0] bits. By default, INVQRSS is disabled and the QRSS
will be transmitted with normal polarity.
0 = Disabled
1 = Enabled
R/W
0
D6
D5
D4
TxTEST2
TxTEST1
TxTEST0
Test Code Pattern
TxTEST[2:0] are used to select a diagnostic test pattern to the line
(transmit outputs).
0XX = No Pattern
100 = Tx QRSS
101 = Tx TAOS
110 = Reserved
111 = Reserved
R/W
0
0
0
TABLE 20: MICROPROCESSOR REGISTER 0X01H BIT DESCRIPTION
CHANNEL 0-7 (0X01H-0X71H)
BIT
NAME
FUNCTION
Register
Type
Default
Value
(HW reset)



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