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XRT83SL314IB Datasheet(PDF) 17 Page - Exar Corporation |
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XRT83SL314IB Datasheet(HTML) 17 Page - Exar Corporation |
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17 / 83 page ![]() xr XRT83SL314 14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT REV. 1.0.1 14 1.0 CLOCK SYNTHESIZER In system design, fewer clocks on the network card could reduce noise and interference. Common clock references such as 8kHz are readily available to network designers. Network cards that support both T1 and E1 modes must be able to produce 1.544MHz and 2.048MHz transmission data. The XRT83SL314 has a built in clock synthesizer that requires only one input clock reference by programming CLKSEL[3:0] in the appropriate global register. A list of the input clock options is shown in Table 1. The single input clock reference is used to generate multiple timing references. The first objective of the clock synthesizer is to generate 1.544MHz and 2.048MHz for each of the 14 channels. This allows each channel to operate in either T1 or E1 mode independent from the other channels. The state of the equalizer control bits in the appropriate channel registers determine whether the LIU operates in T1 or E1 mode. The second objective is to generate additional output clock references for system use. The available output clock references are shown in Figure 2. TABLE 1: INPUT CLOCK SOURCE SELECT CLKSEL[3:0] INPUT CLOCK REFERENCE 0h (0000) 2.048 MHz 1h (0001) 1.544MHz 2h (0010) 8 kHz 3h (0011) 16 kHz 4h (0100) 56 kHz 5h (0101) 64 kHz 6h (0110) 128 kHz 7h (0111) 256 kHz 8h (1000) 4.096 MHz 9h (1001) 3.088 MHz Ah (1010) 8.192 MHz Bh (1011) 6.176 MHz Ch (1100) 16.384 MHz Dh (1101) 12.352 MHz Eh (1110) 2.048 MHz Fh (1111) 1.544 MHz |
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