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SST55LD019M Datasheet(PDF) 39 Page - Silicon Storage Technology, Inc |
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SST55LD019M Datasheet(HTML) 39 Page - Silicon Storage Technology, Inc |
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39 / 59 page ![]() Advance Information ATA Flash Disk Controller SST55LD019M ©2005 Silicon Storage Technology, Inc. S71312-01-000 12/06 39 Features 01H and 81H are used to enable and clear 8-bit data transfer mode. If the 01H feature command is issued all data transfers will occur on the low order D7-D0 data bus and the IOCS16# signal will not be asserted for data register accesses. Features 02H and 82H allow the host to enable or disable write cache in the ATA Flash Disk Controllers that implement write cache. When the subcommand Disable-Write-Cache is issued, the ATA Flash Disk Controller should initiate the sequence to flush cache to non-volatile memory before command completion. Feature 03H allows the host to select the transfer mode by specifying a value in the Sector Count register. The upper 5 bits define the type of transfer and the low order 3 bits encode the mode value. One PIO mode is selected at all times. The host may change the selected modes by the Set-Features command. Features 66H and CCH can be used to enable and disable whether the Power-on Reset (POR) Defaults will be set when a software reset occurs. 10.2.1.18 Set-Multiple-Mode - C6H This command enables the ATA Flash Disk Controller to perform Read and Write-Multiple operations and establishes the block count for these commands. The Sector Count register is loaded with the number of sectors per block. Upon receipt of the command, the ATA Flash Disk Controller sets BSY to 1 and checks the Sector Count register. If the Sector Count register contains a valid value (see Section 10.2.1.5.12 for details) and the block count is supported, the value is loaded for all subsequent Read-Multiple and Write-Multiple commands and execution of those commands is enabled. If a block count is not supported, an Aborted Command error is posted, and Read-Multiple and Write-Multiple commands are disabled. If the Sector Count register contains 0 when the command is issued, Read and Write-Multiple commands are disabled. At power on, or after a hardware or (unless disabled by a Set Feature command) software reset, the default mode is Read and Write-Multiple disabled. TABLE10-6:Transfer Mode Values Mode Bits [7:3] Bits [2:0] PIO default mode 00000b 000b PIO default mode, disable IORDY 00000b 001b PIO flow control transfer mode 00001b mode1 1. Mode = transfer mode number, all other values are not valid Multi-word DMA mode 00100b mode1 Reserved Other N/A T10-6.0 1312 Bit -> 76543210 Command (7) C6H C/D/H (6) XDrive X Cyl High (5) X Cyl Low (4) X Sec Num (3) X Sec Cnt (2) Sector Count Feature (1) X |
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