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TDA1307 Datasheet(PDF) 26 Page - NXP Semiconductors |
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TDA1307 Datasheet(HTML) 26 Page - NXP Semiconductors |
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26 / 36 page ![]() 1996 Jan 08 26 Philips Semiconductors Preliminary specification High-performance bitstream digital filter TDA1307 Notes 1. Minimum VIL, maximum VIH are peak values to allow for transients. 2. II(min) measured at VI = 0 V; II(max) measured at VI =VDD; not valid for pins with pull-up/pull-down resistors. 3. II(min) measured at VI = 0 V (pull-up); II(max) measured at VI =VDD (pull-down); valid for pins with pull-up/pull-down resistors. 4. Crystal frequency: 33.8688 MHz (768fs), the oscillator circuit oscillates at a frequency that is approximately 0.01% above the crystal frequency. QUALITY SPECIFICATION In accordance with “SNW-FQ-611E”. The numbers of the quality specification can be found in the “Quality Reference Handbook”. This handbook can be ordered using the code 9397 750 00192. MICROCONTROLLER INTERFACE (SEE FIGS 6 AND 7) fCK CL input clock frequency −− 46fs kHz tCKL input clock time LOW 2.0 −−µs tCKH input clock time HIGH 2.0 −−µs tDSM microprocessor data set-up time after CL LOW-to-HIGH transition 1.0 −−µs tDHM microprocessor data hold time after CL LOW-to-HIGH transition 2.0 −−µs tDSP peak data set-up time after CL LOW-to-HIGH transition 2.0 −−µs tDHP peak data hold time after CL LOW-to-HIGH transition 2.0 −−µs tdRW delay to write after read 2.0 −−µs tdWR delay to read after write 2.0 −−µs DOBM CIRCUIT fDOBM data output frequency − 128fs − Hz tr output rise time CL =50pF −− 10 ns tf output fall time CL =50pF −− 10 ns tSU;DAT data set-up time 40 −− ns tHD;DAT data hold time 5 −− ns CLOCK GENERATOR CIRCUIT (NOTE 4) fXTAL1 XTAL1 input clock frequency slave mode − 256fs − Hz fCDEC CDEC output clock frequency − 256fs − Hz fCMIC CMIC output clock frequency − 96fs − Hz SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT |
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