Description

STi7109

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Description

The STi7109 is a new generation, high-definition set-top box / DVD decoder chip, and

provides very high performance for low-cost HD systems. STi7109 includes both Windows

Media Video 9 and H.264 video decoders for new, low bit rate applications.

Based on the Omega2 (STBus) architecture, this system-on-chip is a full back-end

processor for digital terrestrial, satellite, cable, DSL and IP client high-definition set-top

boxes, compliant with ATSC, SMPTE VC-1, DVB, DIRECTV, DCII, OpenCable and ARIB

BS4 specifications. It includes all processing for DVD applications.

The STi7109 demultiplexes, decrypts and decodes HD or SD video streams with associated

multichannel audio. Video is output to two independently formatted displays: a full resolution

display intended for a TV monitor, and a downsampled display intended for a VCR or DVD-

R. Connection to a TV or display panel can be analog through the DACs, or digital through a

copy protected DVI/HDMI. Composite outputs are provided for connection to the VCR with

Macrovision protection. Audio is output with optional PCM mixing to an S/PDIF interface,

PCM interface, or through integrated stereo audio DACs.

Digitized analog programs can also be input to the STi7109 for reformatting and display.

The STi7109 includes a graphics rendering and display capability with a 2D graphics

accelerator, three graphics planes and a cursor plane. A dual display compositor provides

mixing of graphics and video with independent composition for each of the TV and

VCR/DVD-R outputs.

The STi7109 includes a stream merger to allow seven different transport streams from

different sources to be merged and processed concurrently. Applications include DVR time-

shifted viewing of a terrestrial program, while acquiring an EPG/data stream from a satellite

or cable front end.

The flexible descrambling engine is compatible with required standards including DVB, DES,

AES and Multi2.

The STi7109 embeds a 266 MHz ST40-202 CPU for applications and device control. A dual

DDR1 SDRAM memory interface is used for higher performance, to allow the video decoder

the required memory bandwidth for VC-1/HD H.264 and sufficient bandwidth for the CPU

and the rest of the system. A second memory bus is also provided for flash memory, storing

resident software, and for connection of peripherals. This bus also has a high speed

synchronous mode that can be used to exchange data between two STi7109 devices. This

can be used to connect a second STi7109 as a co-decoder for a dual TV STB application.

A hard-disk drive (HDD) can be connected either to the serial ATA interface, or as an

expansion drive through the USB 2.0 port.

For IP-TV applications, the integrated 100BT Ethernet controller and MII/RMII interface can

be used for generic Ethernet delivery, as shown in Figure 4: Low-cost HD IP-TV set-top box

with HDD on page 4.

The USB or Ethernet interfaces can also be used to connect to a DOCSIS 2.0 CM gateway

for interactive cable applications.

The STi7109 is supported by STMicroelectronics’ STAPI software, and is compatible with

the STx7100 and STi7710.