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TLS820D2ELVSE Datasheet(PDF) 7 Page - Infineon Technologies AG |
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TLS820D2ELVSE Datasheet(HTML) 7 Page - Infineon Technologies AG |
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7 / 33 page ![]() Datasheet 7 Rev. 1.0 2020-07-27 OPTIREG™ linear TLS820D2ELVSE Low dropout linear voltage regulator General product characteristics 3 General product characteristics 3.1 Absolute maximum ratings Notes 1. Exceeding the absolute max ratings may cause permanent damage to the device and affects the device’s reliability. 2. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as operation outside the normal operating range. Protection functions are not designed for continuous repetitive operation. Table 1 Absolute maximum ratings1) Tj = -40°C to 150°C; all voltages with respect to ground (unless otherwise specified) 1) Not subject to production test, specified by design. Parameter Symbol Values Unit Note or Test Condition Number Min. Typ. Max. Input I, enable EN Voltage VI, VEN -0.3 – 45 V – P_3.1.1 Output Q, reset output RO Voltage VQ, VRO -0.3 – 7 V – P_3.1.2 Select SEL voltage VSEL -0.3 – 7 V – P_3.1.3 Reset delay D, reset adjust RADJ Voltage VD, VRADJ -0.3 – 7 V – P_3.1.4 Temperatures Junction temperature Tj -40 – 150 °C – P_3.1.5 Storage temperature Tstg -55 – 150 °C – P_3.1.6 ESD absorption ESD susceptibility VESD,HBM -2 – 2 kV Human Body Model (HBM)2) 2) ESD susceptibility, HBM according to ANSI/ESDA/JEDEC JS001 (1.5 kΩ, 100 pF) P_3.1.7 ESD susceptibility VESD,CDM -750 – 750 V Charged Device Model (CDM)3) at all pins 3) ESD susceptibility, Charged Device Model “CDM” ESDA STM5.3.1 or ANSI/ESD S.5.3.1 P_3.1.8 |
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