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TDA8007B Datasheet(PDF) 13 Page - NXP Semiconductors |
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TDA8007B Datasheet(HTML) 13 Page - NXP Semiconductors |
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13 / 36 page ![]() 2000 Nov 09 13 Philips Semiconductors Product specification Double multiprotocol IC card interface TDA8007B The time-out counter is very useful for processing the clock counting during ATR, the Work Waiting Time, or the waiting times defined in T = 1 protocol. It should be noted that the 200 and 400 CLK counter used during ATR is done by hardware when the start session is set; a specific hardware controls functionality BGT in T = 1 protocol, and a specific register is available for processing the extra guard time. The possible use of the counters is as follows: • ATR (cold reset): – Before activation; TOR1 = C0H, TOR2 = 6EH, TOR3 = 0 and TOC = 65. Once activated, timer 2 + 3 will count 40920 clock pulses before giving an interrupt. – On interrupt; TOR2 = 76H and TOC = 65. If a character is received from the card before the timeout, then counter 1 will be enabled. Counter 1 will give one interrupt every 192 ETUs, so the software will count 100 times to verify that the ATR is finished before 19200 ETUs. The UART will give an interrupt with bit Buffer Full (BF) at 10.5 ETUs after the start bit. – On interrupt; TOR3 = 25H, TOR2 = 80H and TOC = 65. Counter 1 keeps on counting 100 × 192 ETUs, while counter 2 and 3 counts 9600 ETUs. This sequence is repeated until the character before the last one of the ATR. – On interrupt TOR3 = 25H, TOR2 = 80H and TOC = E5. Timer 1 will be automatically stopped at the end of the last character of the ATR, allowing a count of 19200 ETUs. – On interrupt TOC = 00. • Work Waiting Time (WWT) in T = 0 protocol; – Before sending the first command to the card TOR1, TOR2 and TOR3 should be loaded with the correct 960 × WI × D value and TOC = 7C – Timer 3, 2 and 1 will count the WWT between each start bit • Character Waiting Time (CWT) and Block Waiting Time (BWT) in T = 1 protocol: – Before sending the first block to the card, TOR3, TOR2 and TOR1 should be loaded with the CWT and TOC=7C – Timer 3 + 2 + 1 will count the CWT between each start bit – Before the end of the block, TOR3, TOR2 and TOR1 should be loaded with the BWT – Timer3+2+1 will count the BWT from the last start bit of the sent block – After reception of the first character of the block from the card, TOR3, TOR2 and TOR1 should be loaded with the CWT – Timer3+2+1 will count the CWT between each received start bit – And so on. • Before and after CLOCK STOP (example, where ETU = 372 clock pulses): – After the last received character on I/O, TOR3 = 0, TOR2 = 6 and TOC = 61 – Timer3+2 will start counting 2232 clock pulses before giving an interrupt – On interrupt, the software may stop the clock to the card – When it is necessary to restart the clock, TOR3 = 0, TOR2 = 2, TOC = 61 and restart the clock – Timer3+2 gives an interrupt at 744 clock pulses, and then the software can send the first command to the card. ISO UART REGISTERS When the microcontroller wants to transmit a character to the selected card, it writes the data in direct convention in the UART Transmit Register (see Table 8). The transmission: • Starts at the end of writing (on the rising edge of WR) if the previous character has been transmitted and if the extra guard time has expired; or • Starts at the end of the extra guard time if this one has not expired; or • Does not start if the transmission of the previous character is not completed. In the case of a synchronous card (bit SAN within UCR2 is set), only D0 is relevant, and is copied on the I/O of the selected card. When the microcontroller wants to read data from the card it reads it from the UART Receive Register (see Table 9) in direct convention. In case of a synchronous card, only D0 is relevant and is a copy of the state of the selected card I/O. When needed, this register may be tied to a FIFO whose length ‘n’ is programmable between 1 and 8. If n > 1, then no interrupt is given until the FIFO is full. The microcontroller may empty the FIFO at any time. |
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