MCP23016-ISLASHML datasheet(15/38 Pages) MICROCHIP

15 / 38 page

DS20090C-page 15

MCP23016

1.9.3

READING THE REGISTERS

To read a MCP23016 register, the Master needs to

follow the requirements shown in Figure 1-6. First, the

device is selected by sending the slave address and

setting the R/W bit to logic ‘0’. The command byte is

sent after the address and determines which register

will be read. A restart condition is generated and the

device address is sent again with the R/W bit set to

logic ‘1’. The data register defined by the command

byte will be sent first, followed by the other register in

the register pair. The logic for register selection is the

same as explained in Write mode (Section 1.9.2,

“Writing the Registers”).

The falling edge of the ninth clock initiates the register

read action. The SCL clock will be held low while the

data is read from the register and is transferred to the

I2C bus control block by the Serializer/Deserializer

block.

The MCP23016 holds the clock low after the falling

edge of the ninth clock pulse. The configuration

registers (or port control registers) are read and the

value is stored. Finally, the clock is released to enable

the next transmission.

There is no limitation on the number of data bytes in

one read transmission. Figure 1-8 shows the case of

multiple byte read in one read operation. In this case,

the multiple writes are made to the same data pair.

FIGURE 1-6:

READ FROM

CONFIGURATION

Note:

The bus must remain free until after the

ninth clock pulse for a minimum of 12 µs

(see Table 2-5 and Figure 2-4).

MCP23016-I/ML Datasheet(PDF) 15 Page - Microchip Technology