TDA8362 datasheet(18/36 Pages) PHILIPS

18 / 36 page

March 1994

Philips Semiconductors

Objective speciﬁcation

Integrated PAL and PAL/NTSC TV

processors

TDA8360; TDA8361; TDA8362

SECOND CONTROL LOOP; NOTE 32 (CAPACITOR CONNECTED TO PIN 39)

∆ϕi/∆ϕo

control sensitivity

without RL on pin 39

−

150

−µs/µs

tcr

control range from start of horizontal

output to ﬂyback

−µs

tshift

maximum horizontal shift range

note 7

±2

−−µs

∆ϕ

i/∆ϕo

shift control sensitivity

note 7

−

−µA/µs

V39

voltage to switch on the X-ray

protection

−−

input current during protection

−−

tbf

µA

HORIZONTAL OUTPUT (PIN 37)

VOL

LOW level output voltage

IO = 10 mA

−−

0.3

IO(max)

maximum allowed output current

−−

VO(max)

maximum allowed output voltage

−−

duty factor

note 7

−

FLYBACK INPUT/SANDCASTLE OUTPUT (PIN 38)

I38

required input current during ﬂyback

pulse

note 7

100

−

300

µA

output voltage during burst key

4.8

5.3

5.8

output voltage during blanking

1.8

2.0

2.2

VIcl

clamped input voltage during ﬂyback

2.6

3.0

3.4

burst key pulse width

3.3

3.5

3.7

µs

vertical blanking pulse width

note 33

−

lines

delay of start of burst key to start

of sync

5.2

5.4

5.6

µs

VERTICAL SECTION; NOTE 34

ffr

free running frequency

−

50/60

−

flock

locking range

−

64.5

divider value not locked

−

625/525

−

locking range (lines/frame)

488

−

722

VERTICAL RAMP GENERATOR (PIN 42)

I42

input current during scan

note 7

−−

µA

Idis

discharge current during retrace

−

0.3

−

Vsaw(p-p)

sawtooth amplitude

(peak-to-peak value)

in 50 Hz mode

−

1.5

1.8

delay from ﬁeld-to-ﬁeld

−−

1.6

µs

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

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