LP1072 datasheet(10/32 Pages) FREESCALE

10 / 32 page

LP1072 Advance Information, Rev. 0.3

Freescale Semiconductor

PRELIMINARY

LP1072 Interfaces

3.4.5

Aux DAC

AUX DAC specifications are shown in Table 7.

LP1072 Interfaces

4.1

SDIO Host Interface

The LP1072 supports SDIO Card Specifications, Version 1.00 (http//www.sdcard.org). The LP1072 SDIO

host interface supports the I/O mode of the SD Card Specifications.

4.1.1

SDIO Supported Features

The features supported by the LP1072 SDIO host interface are:

•

SD 1-Bit Mode

•

SD 4-Bit Mode

•

Low Speed

•

Full Speed (25 MHz)

•

Interrupt

•

CMD52 during Data Transfer

•

CMD53 Multi Block Transfer

•

Interrupt during 4-bit Multiple Block Data Transfer

Table 7. Aux DAC Specifications

Parameter

Condition

Min

Typ

Max

Units

Resolution

—

bit

Maximum Update rate

—

MHz

Output voltage for full scale input1

1 Due to saturation of the output buffer, INL and DNL are not applicable for output voltages below 200 mV. Output is monotonic

above 0.1 V.

—

0.1

—

2.4

Load

—

5—

—

kOhm

——

—

Propagation delay (tpd)

—

5—

Settling time (ts)

—

Integral Nonlinearity (INL)

—

±1.0

—

LSB

Differential Nonlinearity (DNL)

—

± 0.5

—

LSB

ENOB

Fin = 1 MHz

—

7.2

—

bit

Wake-up time

From Shutdown

—

µs

From Standby

—

µs

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