TCN75 datasheet(3/20 Pages) MICROCHIP

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DS21490C-page 3

TCN75

1.0

ELECTRICAL

CHARACTERISTICS

Absolute Maximum Ratings*

Supply Voltage (VDD) ............................................ 6.0V

ESD Susceptibility (Note 3) ............................... 1000V

Voltage on Pins:

A0, A1, A2 .......... (GND – 0.3V) to (VDD + 0.3V)

Voltage on Pins:

SDA, SCL, INT/CMPTR .. (GND – 0.3V) to 5.5V

Thermal Resistance (Junction to Ambient)

8-Pin SOIC.......................................... 170°C/W

8-Pin MSOP ....................................... 250°C//W

Operating Temperature Range (TJ): -55°C to +125°C

Storage Temperature Range (TSTG): -65°C to +150°C

*Stresses

above

those

listed

under

“Absolute

Maximum Ratings” may cause permanent damage to

the device. These are stress ratings only and functional

operation of the device at these or any other conditions

above those indicated in the operation sections of the

specifications is not implied. Exposure to Absolute

Maximum Rating conditions for extended periods may

affect device reliability.

TCN75 ELECTRICAL SPECIFICATIONS

Electrical Characteristics: VDD = 2.7V – 5.5V, -55°C ≤ (TA = TJ) ≤ 125°C, unless otherwise noted.

Symbol

Parameter

Min

Typ

Max

Units

Test Conditions

Power Supply

VDD

Power Supply Voltage

2.7

—

5.5

—

IDD

Operating Current

—

0.250

—

1.0

Serial Port Inactive (TA = TJ = 25°C)

Serial Port Active

IDD1

Standby Supply Current

—

μA

Shutdown Mode, Serial Port

Inactive (TA = TJ = 25°C)

INT/CMPTR Output

IOL

Sink Current: INT/CMPTR,

SDA Outputs

—1

Note 1

tTRIP

INT/CMPTR Response Time

—

tCONV User Programmable

VOL

Output Low Voltage

—

0.8

IOL = 4.0 mA

Temp-to-Bits Converter

ΔT

Temperature Accuracy (Note 2)

—±3

—

°C

-55°C

≤ TA ≤ +125°C

VDD = 3.3V: TCN75-3.3 MOA,

TCN75-3.3 MUA

VDD = 5.0V: TCN75-5.0 MOA,

TCN75-5.0 MUA

—±0.5

±3

°C25°C ≤ TA ≤ 100°C

tCONV

Conversion Time

—

msec

TSET(PU)

TEMP Default Value

—

°C

Power-up

THYST(PU)

THYST Default Value

—

°C

Power-up

2-Wire Serial Bus Interface

VIH

Logic Input High

VDD x 0.7

—

VIL

Logic Input Low

—

VDD x 0.3

VOL

Logic Output Low

—

0.4

IOL = 3 mA

CIN

Input Capacitance SDA, SCL

—

ILEAK

I/O Leakage

—

±100

—

(TA = TJ = 25°C)

IOL(SDA)

SDA Output Low Current

—

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