TDA8714MSLASH7 datasheet(8/24 Pages) PHILIPS

8 / 24 page

1997 Oct 29

Philips Semiconductors

Product speciﬁcation

8-bit high-speed analog-to-digital converter

TDA8714

EFFECTIVE BITS (note 6; see Figs 7 and 13)

effective bits

TDA8714/4

fclk = 40 MHz

fi = 4.43 MHz

−

7.75

−

bits

fi = 7.5 MHz

−

7.6

−

bits

effective bits

TDA8714/6

fclk = 60 MHz

fi = 4.43 MHz

−

7.7

−

bits

fi = 7.5 MHz

−

7.55

−

bits

fi = 10 MHz

−

7.4

−

bits

effective bits

TDA8714/7

fclk = 80 MHz

fi = 4.43 MHz

−

7.7

−

bits

fi = 7.5 MHz

−

7.5

−

bits

fi = 10 MHz

−

7.2

−

bits

fi = 15 MHz

−

6.3

−

bits

TWO-TONE (note 7)

TTIR

two-tone intermodulation rejection

fclk = 40 MHz

−−56

−

BIT ERROR RATE

BER

bit error rate

fclk = 40 MHz;

fi = 4.43 MHz;

VI = ±16 LSB at

code 128

−

10−11

−

times/

samples

DIFFERENTIAL GAIN (note 8)

Gdiff

differential gain

fclk = 40 MHz;

fi = 4.43 MHz

−

0.6

−

DIFFERENTIAL PHASE (note 8)

diff

differential phase

fclk = 40 MHz;

fi = 4.43 MHz

−

0.8

−

deg

Timing (note 9; see Figs 3 and 5; fclk = 80 MHz)

tds

sampling delay time

−−

2ns

output hold time

−−

output delay time

−

3-state output delay times (see Fig.4)

tdZH

enable HIGH

−

tdZL

enable LOW

−

tdHZ

disable HIGH

−

tdLZ

disable LOW

−

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

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