TDA8772HSLASH3 datasheet(7/20 Pages) PHILIPS

7 / 20 page

1997 Mar 06

Philips Semiconductors

Product speciﬁcation

Triple 8-bit video digital-to-analog

converter

TDA8772

CHARACTERISTICS

TDA8772H/3 operating at 35 MHz and TDA8772H/8 operating at 85 MHz unless otherwise speciﬁed.

VDDA =VDDD = 4.5 V to 5.5 V; VSSA and VSSD shorted together; VDDA − VDDD = −0.5 V to +0.5 V; Tamb = 0 to +70 °C;

typical values measured at VDDA =VDDD = 5 V and Tamb =25 °C; unless otherwise speciﬁed.

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

Supplies

VDDA

analog supply voltage

4.5

5.0

5.5

VDDD

digital supply voltage

4.5

5.0

5.5

IDDA

analog supply current

RL =75 Ω; note 1

100

IDDD

digital supply current

TDA8772H/3

−

716

TDA8772H/8

−

Inputs

CLOCK INPUTS (PINS 21 TO 23)

VIL

LOW level input voltage

VSSD − 0.5 −

0.8

VIH

HIGH level input voltage

2.0

−

VDDD + 0.5 V

BLANK, SYNC INPUTS (PINS 12 AND 11; ACTIVE LOW)

VIL

LOW level input voltage

VSSD − 0.5 −

0.8

VIH

HIGH level input voltage

2.0

−

VDDD + 0.5 V

R, G, B DIGITAL INPUTS (PINS 1 TO 8, 13 TO 20 AND 24 TO 31)

VIL

LOW level input voltage

VSSD − 0.5 −

0.8

VIH

HIGH level input voltage

2.0

−

VDDD + 0.5 V

IREFA INTERNAL REFERENCE SUPPLY CURRENT (PIN 38)

Ii(REFA)

input current

−

0.17

0.25

IREFB OUTPUT BUFFER SUPPLY CURRENT (PIN 41)

Ii(REFB)

input current

−

0.5

0.7

Timing (CL = 25 pF; RL =75 Ω); see Fig.3

fclk(max)

maximum clock frequency

TDA8772H/3

−−

MHz

TDA8772H/8

−−

MHz

tCPH

clock pulse width HIGH

−−

tCPL

clock pulse width LOW

−−

clock rise time

TDA8772H/3

−−

5ns

TDA8772H/8

−−

3ns

clock fall time

TDA8772H/3

−−

5ns

TDA8772H/8

−−

3ns

tSU;DAT

input data set-up time

−−

tHD;DAT

input data hold time

2.5

−−

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