2:1 Multiplexers and 1:2 Demultiplexers with

Loopback

8

_______________________________________________________________________________________

0V

3V

1.5V

1.5V

50%

50%

50%

50%

PULSE

GENERATOR

IN_ _

IN_ _

50

Ω

OUT_ _

OUT_ _

1.25V

MAX9394/MAX9395

EN_ _

Ω ±1%

Figure 4. Output Active-to-Disable and Disable-to-Active Test Circuit and Timing Diagram

LB_SELA

0

LB

PULSE

GENERATOR

OUTA0

OUTA0

OUTA1

OUTA1

INA

INA

50

Ω

50

Ω

MAX9394

MAX9395

ENA0 = ENA1 = HIGH

1 CHANNEL SHOWN.

FROM

CHANNEL B

Ω ±1%

Figure 5. Output Transition Time, Propagation Delay, and Output Channel-to-Channel Skew Test Circuit