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PIC18F4685-I/SP Datasheet(PDF) 350 Page - Microchip Technology |
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PIC18F4685-I/SP Datasheet(HTML) 350 Page - Microchip Technology |
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350 / 484 page ![]() PIC18F2682/2685/4682/4685 DS39761B-page 348 Preliminary © 2007 Microchip Technology Inc. REGISTER 24-6: CONFIG5L: CONFIGURATION REGISTER 5 LOW (BYTE ADDRESS 300008h) U-0 U-0 R/C-1 R/C-1 R/C-1 R/C-1 R/C-1 R/C-1 — —CP5(1) CP4 CP3 CP2 CP1 CP0 bit 7 bit 0 Legend: R = Readable bit C = Clearable bit U = Unimplemented bit, read as ‘0’ -n = Value when device is unprogrammed u = Unchanged from programmed state bit 7-6 Unimplemented: Read as ‘0’ bit 5 CP5: Code Protection bit(1) 1 = Block 5 (014000-017FFFh) not code-protected 0 = Block 5 (014000-017FFFh) code-protected bit 4 CP4: Code Protection bit 1 = Block 4 (010000-013FFFh) not code-protected 0 = Block 4 (010000-013FFFh) code-protected bit 3 CP3: Code Protection bit 1 = Block 3 (00C000-00FFFFh) not code-protected 0 = Block 3 (00C000-00FFFFh) code-protected bit 2 CP2: Code Protection bit 1 = Block 2 (008000-00BFFFh) not code-protected 0 = Block 2 (008000-00BFFFh) code-protected bit 1 CP1: Code Protection bit 1 = Block 1 (004000-007FFFh) not code-protected 0 = Block 1 (004000-007FFFh) code-protected bit 0 CP0: Code Protection bit 1 = Block 0 (000800-003FFFh) not code-protected 0 = Block 0 (000800-003FFFh) code-protected Note 1: Unimplemented in PIC18F2682/4682 devices; maintain this bit set. REGISTER 24-7: CONFIG5H: CONFIGURATION REGISTER 5 HIGH (BYTE ADDRESS 300009h) R/C-1 R/C-1 U-0 U-0 U-0 U-0 U-0 U-0 CPD CPB — — — — — — bit 7 bit 0 Legend: R = Readable bit C = Clearable bit U = Unimplemented bit, read as ‘0’ -n = Value when device is unprogrammed u = Unchanged from programmed state bit 7 CPD: Data EEPROM Code Protection bit 1 = Data EEPROM not code-protected 0 = Data EEPROM code-protected bit 6 CPB: Boot Block Code Protection bit 1 = Boot Block (000000-0007FFh) not code-protected 0 = Boot Block (000000-0007FFh) code-protected bit 5-0 Unimplemented: Read as ‘0’ |
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