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DSPIC33FJ32GP202-E/SP Datasheet(PDF) 171 Page - Microchip Technology |
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DSPIC33FJ32GP202-E/SP Datasheet(HTML) 171 Page - Microchip Technology |
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171 / 252 page  © 2007 Microchip Technology Inc. Preliminary DS70290A-page 169 dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304 FIGURE 17-2: ADC1 MODULE BLOCK DIAGRAM FOR dsPIC33FJ32GP202 DEVICES S/H + - Conversion Conversion Logic VREF+(1) AVSS AVDD ADC1 16-bit ADC Output 00000 00101 01001 00001 00010 00011 00100 01010 01011 AN9 AN10 AN11 AN2 AN4 AN0 AN3 AN1 AN5 CH1(2) CH2(2) CH3(2) CH0 AN5 AN2 AN11 VREF- AN4 AN1 AN10 VREF- AN3 AN0 AN9 VREF- AN1 VREF- VREF-(1) Sample/Sequence Control Sample CH1,CH2, CH3,CH0 Input MUX Control Input Switches S/H + - S/H + - S/H + - Buffer Result Note 1: VREF+, VREF- inputs may be multiplexed with other analog inputs. 2: Channels 1, 2 and 3 are not applicable for the 12-bit mode of operation. 01100 AN12 |
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