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PIC18F23K20-E/ML Datasheet(PDF) 407 Page - Microchip Technology |
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PIC18F23K20-E/ML Datasheet(HTML) 407 Page - Microchip Technology |
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407 / 420 page  © 2007 Microchip Technology Inc. Advance Information DS41303B-page 405 PIC18F2XK20/4XK20 INDEX A A/D Analog Port Pins, Configuring .................................. 261 Associated Registers ............................................... 261 Conversions ............................................................. 252 Converter Characteristics ........................................ 384 Discharge ................................................................. 253 Selecting and Configuring Acquisition Time ............ 250 Special Event Trigger (ECCP) ................................. 164 Absolute Maximum Ratings ............................................. 353 AC (Timing) Characteristics ............................................. 367 Load Conditions for Device Timing Specifications ... 368 Parameter Symbology ............................................. 367 Temperature and Voltage Specifications ................. 368 Timing Conditions .................................................... 368 AC Characteristics Internal RC Accuracy ............................................... 370 Access Bank Mapping with Indexed Literal Offset Mode ................. 84 ACKSTAT ........................................................................ 214 ACKSTAT Status Flag ..................................................... 214 ADC ................................................................................. 249 Acquisition Requirements ........................................ 259 Block Diagram .......................................................... 249 Calculating Acquisition Time .................................... 259 Channel Selection .................................................... 250 Configuration ............................................................ 250 Conversion Clock ..................................................... 250 Conversion Procedure ............................................. 254 Internal Sampling Switch (RSS) IMPEDANCE ............. 259 Interrupts .................................................................. 251 Operation ................................................................. 252 Operation During Sleep ........................................... 253 Port Configuration .................................................... 250 Power Management ................................................. 253 Reference Voltage (VREF) ........................................ 250 Result Formatting ..................................................... 251 Source Impedance ................................................... 259 Special Event Trigger ............................................... 253 Starting an A/D Conversion ..................................... 251 ADCON0 Register ............................................................ 255 ADCON1 Register .................................................... 256, 257 ADDFSR .......................................................................... 342 ADDLW ............................................................................ 305 ADDULNK ........................................................................ 342 ADDWF ............................................................................ 305 ADDWFC ......................................................................... 306 ADRESH Register (ADFM = 0) ........................................ 258 ADRESH Register (ADFM = 1) ........................................ 258 ADRESL Register (ADFM = 0) ......................................... 258 ADRESL Register (ADFM = 1) ......................................... 258 Analog Input Connection Considerations ......................... 270 Analog-to-Digital Converter. See ADC ANDLW ............................................................................ 306 ANDWF ............................................................................ 307 ANSEL (PORT Analog Control) ....................................... 130 ANSEL Register ............................................................... 130 ANSELH Register ............................................................ 131 Assembler MPASM Assembler .................................................. 350 B Bank Select Register (BSR) .............................................. 69 Baud Rate Generator ...................................................... 210 BAUDCTL Register .......................................................... 234 BC .................................................................................... 307 BCF ................................................................................. 308 BF .................................................................................... 214 BF Status Flag ................................................................. 214 Block Diagrams ADC ......................................................................... 249 ADC Transfer Function ............................................ 260 Analog Input Model .......................................... 260, 270 Baud Rate Generator .............................................. 210 Capture Mode Operation ......................................... 154 CCP PWM ............................................................... 157 Clock Source ............................................................. 25 Comparator 1 ........................................................... 264 Comparator 2 ........................................................... 264 Comparator Voltage Reference ............................... 274 Compare Mode Operation ....................................... 155 Crystal Operation ....................................................... 29 EUSART Receive .................................................... 224 EUSART Transmit ................................................... 223 External POR Circuit (Slow VDD Power-up) .............. 51 External RC Mode ..................................................... 30 Fail-Safe Clock Monitor (FSCM) ................................ 38 Generic I/O Port ....................................................... 115 High/Low-Voltage Detect with External Input .......... 278 Interrupt Logic .......................................................... 102 MSSP (I2C Master Mode) ........................................ 208 MSSP (I2C Mode) .................................................... 192 MSSP (SPI Mode) ................................................... 183 On-Chip Reset Circuit ................................................ 49 PIC18F2XK20 ............................................................ 12 PIC18F4XK20 ............................................................ 13 PLL (HS Mode) .......................................................... 33 PORTD and PORTE (Parallel Slave Port) ............... 133 PWM (Enhanced) .................................................... 165 Reads from Flash Program Memory ......................... 89 Resonator Operation ................................................. 29 Table Read Operation ............................................... 85 Table Write Operation ............................................... 86 Table Writes to Flash Program Memory .................... 91 Timer0 in 16-Bit Mode ............................................. 137 Timer0 in 8-Bit Mode ............................................... 136 Timer1 ..................................................................... 140 Timer1 (16-Bit Read/Write Mode) ............................ 140 Timer2 ..................................................................... 146 Timer3 ..................................................................... 148 Timer3 (16-Bit Read/Write Mode) ............................ 149 Voltage Reference Output Buffer Example ............. 275 Watchdog Timer ...................................................... 292 BN .................................................................................... 308 BNC ................................................................................. 309 BNN ................................................................................. 309 BNOV .............................................................................. 310 BNZ ................................................................................. 310 BOR. See Brown-out Reset. BOV ................................................................................. 313 BRA ................................................................................. 311 Break Character (12-bit) Transmit and Receive .............. 241 BRG. See Baud Rate Generator. Brown-out Reset (BOR) ..................................................... 52 |
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