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PIC18F23K20-E/ML Datasheet(PDF) 416 Page - Microchip Technology |
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PIC18F23K20-E/ML Datasheet(HTML) 416 Page - Microchip Technology |
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416 / 420 page ![]() PIC18F2XK20/4XK20 DS41303B-page 414 Advance Information © 2007 Microchip Technology Inc. (Slave Mode, CKE = 0) .................................... 377 (Slave Mode, CKE = 1) .................................... 378 External Clock Requirements .................................. 369 I2C Bus Data Requirements (Slave Mode) .............. 380 I2C Bus Start/Stop Bits Requirements (Slave Mode) ..... 379 Master SSP I2C Bus Data Requirements ................ 382 Master SSP I2C Bus Start/Stop Bits Requirements . 381 Parallel Slave Port Requirements (PIC18F4X20) .... 374 PLL Clock ................................................................. 370 Reset, Watchdog Timer, Oscillator Start-up Timer, Power-up Timer and Brown-out Reset Requirements ................................................... 372 Timer0 and Timer1 External Clock Requirements ... 373 USART Synchronous Receive Requirements ......... 383 USART Synchronous Transmission Requirements . 383 Top-of-Stack Access .......................................................... 64 TRISE Register ................................................................ 128 PSPMODE Bit .......................................................... 124 TSTFSZ ............................................................................ 339 Two-Speed Clock Start-up Mode ....................................... 35 Two-Speed Start-up ......................................................... 283 Two-Word Instructions Example Cases .......................................................... 68 TXREG ............................................................................. 225 TXSTA Register ............................................................... 232 BRGH Bit ................................................................. 235 V Voltage Reference. See Comparator Voltage Reference (CVREF) Voltage References Fixed Voltage Reference (FVR) ............................... 274 VR Stabilization ........................................................ 274 VREF. SEE ADC Reference Voltage W Wake-up on Break ........................................................... 240 Watchdog Timer (WDT) ........................................... 283, 292 Associated Registers ............................................... 293 Control Register ....................................................... 293 Programming Considerations .................................. 292 WCOL ...................................................... 212, 213, 214, 217 WCOL Status Flag ................................... 212, 213, 214, 217 WDTCON Register .......................................................... 293 WWW Address ................................................................ 409 WWW, On-Line Support ...................................................... 8 X XORLW ............................................................................ 339 XORWF ........................................................................... 340 |
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