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PIC18F258-E/LSQTP Datasheet(PDF) 249 Page - Microchip Technology |
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PIC18F258-E/LSQTP Datasheet(HTML) 249 Page - Microchip Technology |
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249 / 402 page ![]() © 2006 Microchip Technology Inc. DS41159E-page 247 PIC18FXX8 20.4 A/D Conversions Figure 20-4 shows the operation of the A/D converter after the GO bit has been set. Clearing the GO/DONE bit during a conversion will abort the current conver- sion. The A/D Result register pair will not be updated with the partially completed A/D conversion sample. That is, the ADRESH:ADRESL registers will continue to contain the value of the last completed conversion (or the last value written to the ADRESH:ADRESL registers). After the A/D conversion is aborted, a 2 TAD wait is required before the next acquisition is started. After this 2 TAD wait, acquisition on the selected channel is automatically started. 20.4.1 A/D RESULT REGISTERS The ADRESH:ADRESL register pair is the location where the 10-bit A/D result is loaded at the completion of the A/D conversion. This register pair is 16 bits wide. The A/D module gives the flexibility to left or right justify the 10-bit result in the 16-bit result register. The A/D Format Select bit (ADFM) controls this justification. Figure 20-3 shows the operation of the A/D result justi- fication. The extra bits are loaded with ‘0’s. When an A/D result will not overwrite these locations (A/D disable), these registers may be used as two general purpose 8-bit registers. FIGURE 20-3: A/D RESULT JUSTIFICATION Note: The GO/DONE bit should NOT be set in the same instruction that turns on the A/D. 10-bit Result ADRESH ADRESL 0000 00 ADFM = 0 0 2 1 0 7 7 10-bit Result ADRESH ADRESL 10-bit Result 0000 00 7 0 7 6 5 0 ADFM = 1 Right Justified Left Justified |
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