PIC18F258-ESLASHLSQTP datasheet(247/402 Pages) MICROCHIP

247 / 402 page

DS41159E-page 245

PIC18FXX8

calculate

the

minimum

acquisition

time,

Equation 20-1 may be used. This equation assumes

that 1/2 LSb error is used (1024 steps for the A/D). The

1/2 LSb error is the maximum error allowed for the A/D

to meet its specified resolution.

Example 20-1 shows the calculation of the minimum

required acquisition time TACQ. This calculation is

based on the following application system assumptions:

•CHOLD

120 pF

• Rs

2.5 k

• Conversion Error

≤

1/2 LSb

•VDD

→ Rss = 7 kΩ

• Temperature

°C (system max.)

•VHOLD

=0V @ time = 0

EQUATION 20-1:

ACQUISITION TIME

EQUATION 20-2:

A/D MINIMUM CHARGING TIME

EXAMPLE 20-1:

CALCULATING THE MINIMUM REQUIRED ACQUISITION TIME

TACQ

Amplifier Settling Time + Holding Capacitor Charging Time + Temperature Coefficient

=TAMP + TC + TCOFF

VHOLD

(VREF – (VREF/2048)) • (1 – e(-Tc/C

HOLD

(RIC + RSS + RS)))

-(120 pF)(1 k

Ω + RSS + RS) ln(1/2047)

TACQ

=TAMP + TC + TCOFF

Temperature coefficient is only required for temperatures > 25

°C.

TACQ

μs + TC + [(Temp – 25°C)(0.05 μs/°C)]

=-CHOLD (RIC + RSS + RS) ln(1/2047)

-120 pF (1 k

Ω + 7 kΩ + 2.5 kΩ) ln(0.0004885)

-120 pF (10.5 k

Ω) ln(0.0004885)

-1.26

μs (-7.6241)

9.61

μs

TACQ

μs + 9.61 μs + [(50°C – 25°C)(0.05 μs/°C)]

11.61

μs + 1.25 μs

12.86

μs

Note:

When using external voltage references with the A/D converter, the source impedance of the external

voltage references must be less than 20

Ω to obtain the specified A/D resolution. Higher reference source

impedances will increase both offset and gain errors. Resistive voltage dividers will not provide a sufficiently

low source impedance.

To maintain the best possible performance in A/D conversions, external VREF inputs should be buffered with

an operational amplifier or other low output impedance circuit.

PIC18F258-E/LSQTP Datasheet(PDF) 247 Page - Microchip Technology

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