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PIC18F258-E/LSQTP Datasheet(PDF) 244 Page - Microchip Technology

Part # PIC18F258-E/LSQTP
Description  28/40-Pin High-Performance, Enhanced Flash Microcontrollers with CAN Module
PDF  402 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18F258-E/LSQTP Datasheet(HTML) 244 Page - Microchip Technology

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PIC18FXX8
DS41159E-page 242
© 2006 Microchip Technology Inc.
REGISTER 20-2:
ADCON1: A/D CONTROL REGISTER 1
R/W-0
R/W-0
U-0
U-0
R/W-0
R/W-0
R/W-0
R/W-0
ADFM
ADCS2
—
—
PCFG3
PCFG2
PCFG1
PCFG0
bit 7
bit 0
bit 7
ADFM: A/D Result Format Select bit
1
= Right justified. Six (6) Most Significant bits of ADRESH are read as ‘0’.
0
= Left justified. Six (6) Least Significant bits of ADRESL are read as ‘0’.
bit 6
ADCS2: A/D Conversion Clock Select bit (ADCON1 bits in bold)
bit 5-4
Unimplemented: Read as ‘0’
bit 3-0
PCFG3:PCFG0: A/D Port Configuration Control bits
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
Note:
On any device Reset, the port pins that are multiplexed with analog functions (ANx)
are forced to be analog inputs.
ADCON1
<ADCS2>
ADCON0
<ADCS1:ADCS0>
Clock Conversion
0
00
FOSC/2
0
01
FOSC/8
0
10
FOSC/32
0
11
FRC (clock derived from the internal A/D RC oscillator)
1
00
FOSC/4
1
01
FOSC/16
1
10
FOSC/64
1
11
FRC (clock derived from the internal A/D RC oscillator)
A = Analog input D = Digital I/O
C/R = # of analog input channels/# of A/D voltage references
Note:
Shaded cells indicate channels available only on PIC18F4X8 devices.
PCFG
AN7
AN6
AN5
AN4
AN3
AN2
AN1
AN0
VREF+VREF-C/R
0000
A
A
AA
A
A
A
A
VDD
VSS
8/0
0001
A
A
AA
VREF+A
A
A
AN3
VSS
7/1
0010
D
D
DA
A
A
A
A
VDD
VSS
5/0
0011
D
D
DA
VREF+A
A
A
AN3
VSS
4/1
0100
D
D
DD
A
D
A
A
VDD
VSS
3/0
0101
D
D
DD
VREF+D
A
A
AN3
VSS
2/1
011x
D
D
DD
D
D
D
D
—
—
0/0
1000
A
A
AA
VREF+VREF-A
A
AN3
AN2
6/2
1001
D
D
AA
A
A
A
A
VDD
VSS
6/0
1010
D
D
AA
VREF+A
A
A
AN3
VSS
5/1
1011
D
D
AA
VREF+VREF-A
A
AN3
AN2
4/2
1100
D
D
DA
VREF+VREF-A
A
AN3
AN2
3/2
1101
D
D
DD
VREF+VREF-A
A
AN3
AN2
2/2
1110
D
D
DD
D
D
D
A
VDD
VSS
1/0
1111
D
D
DD
VREF+VREF-D
A
AN3
AN2
1/2



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