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PIC18F258-E/LSQTP Datasheet(PDF) 395 Page - Microchip Technology |
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PIC18F258-E/LSQTP Datasheet(HTML) 395 Page - Microchip Technology |
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395 / 402 page  © 2006 Microchip Technology Inc. DS41159E-page 393 PIC18FXX8 Prescaler, Timer2.............................................................. 128 PRO MATE II Universal Device Programmer .............................................................. 325 Program Counter PCL Register............................................................... 40 PCLATH Register ....................................................... 40 PCLATU Register ....................................................... 40 Program Memory ................................................................ 37 Fast Register Stack..................................................... 40 Instructions.................................................................. 41 Two-Word ........................................................... 43 Map and Stack for PIC18F248/448............................. 37 Map and Stack for PIC18F258/458............................. 37 PUSH and POP Instructions ....................................... 40 Return Address Stack ................................................. 38 Return Stack Pointer (STKPTR) ................................. 38 Stack Full/Underflow Resets....................................... 40 Top-of-Stack Access................................................... 38 Program Verification and Code Protection ........................................................ 276 Associated Registers Summary................................ 276 Configuration Register Protection ............................. 279 Data EEPROM Code Protection ............................... 279 Program Memory Code Protection ........................... 277 Programming, Device Instructions .................................... 281 PUSH ................................................................................ 310 PWM (CCP Module) ......................................................... 128 CCPR1H:CCPR1L Registers.................................... 128 Duty Cycle................................................................. 128 Example Frequencies/Resolutions ........................... 129 Period........................................................................ 128 Registers Associated with PWM and Timer2 .............................................. 129 Setup for PWM Operation......................................... 129 TMR2 to PR2 Match ......................................... 117, 128 PWM (ECCP Module) ....................................................... 134 Full-Bridge Application Example ............................... 138 Full-Bridge Mode....................................................... 137 Direction Change .............................................. 138 Half-Bridge Mode ...................................................... 136 Half-Bridge Output Mode Applications Example ....................................... 136 Output Configurations ............................................... 134 Output Polarity Configuration .................................... 140 Output Relationships Diagram .................................. 135 Programmable Dead-Band Delay ............................. 140 Registers Associated with Enhanced PWM and Timer2........................................................ 141 Setup for PWM Operation......................................... 141 Standard Mode ......................................................... 134 Start-up Considerations ............................................ 140 System Implementation ............................................ 140 Q Q Clock ............................................................................. 128 R RAM. See Data Memory. RCALL .............................................................................. 311 RCON Register Significance of Status Bits vs. Initialization Condition ......................................... 27 RCSTA Register ............................................................... 183 SPEN Bit ................................................................... 183 Receiver Warning ............................................................. 239 Register File ........................................................................ 44 Register File Summary ....................................................... 49 Registers ADCON0 (A/D Control 0).......................................... 241 ADCON1 (A/D Control 1).......................................... 242 BRGCON1 (Baud Rate Control 1)............................ 218 BRGCON2 (Baud Rate Control 2)............................ 219 BRGCON3 (Baud Rate Control 3)............................ 220 CANCON (CAN Control) .......................................... 201 CANSTAT (CAN Status)........................................... 202 CCP1CON (CCP1 Control) ...................................... 123 CIOCON (CAN I/O Control) ...................................... 221 CMCON (Comparator Control) ................................. 249 COMSTAT (CAN Communication Status) .................................... 205 CONFIG1H (Configuration 1 High)........................... 266 CONFIG2H (Configuration 2 High)........................... 267 CONFIG2L (Configuration 2 Low) ............................ 266 CONFIG4L (Configuration 4 Low) ............................ 267 CONFIG5H (Configuration 5 High)........................... 268 CONFIG5L (Configuration 5 Low) ............................ 268 CONFIG6H (Configuration 6 High)........................... 269 CONFIG6L (Configuration 6 Low) ............................ 269 CONFIG7H (Configuration 7 High)........................... 270 CONFIG7L (Configuration 7 Low) ............................ 270 CVRCON (Comparator Voltage Reference Control) ........................................... 255 DEVID1 (Device ID 1)............................................... 271 DEVID2 (Device ID 2)............................................... 271 ECCP1CON (ECCP1 Control).................................. 131 ECCP1DEL (PWM Delay) ........................................ 140 ECCPAS (Enhanced Capture/Compare/PWM Auto-Shutdown Control) ................................... 142 EECON1 (EEPROM Control 1) ............................ 60, 67 INTCON (Interrupt Control) ........................................ 79 INTCON2 (Interrupt Control 2) ................................... 80 INTCON3 (Interrupt Control 3) ................................... 81 IPR1 (Peripheral Interrupt Priority 1) .......................... 88 IPR2 (Peripheral Interrupt Priority 2) .......................... 89 IPR3 (Peripheral Interrupt Priority 3) .................. 90, 224 LVDCON (LVD Control)............................................ 261 OSCCON (Oscillator Control)..................................... 20 PIE1 (Peripheral Interrupt Enable 1) .......................... 85 PIE2 (Peripheral Interrupt Enable 2) .......................... 86 PIE3 (Peripheral Interrupt Enable 3) .................. 87, 223 PIR1 (Peripheral Interrupt Request (Flag) 1) .............................................................. 82 PIR2 (Peripheral Interrupt Request (Flag) 2) .............................................................. 83 PIR3 (Peripheral Interrupt Request (Flag) 3) ...................................................... 84, 222 RCON (Reset Control).......................................... 58, 91 RCSTA (Receive Status and Control) ...................... 184 RXB0CON (Receive Buffer 0 Control)...................... 210 RXB1CON (Receive Buffer 1 Control)...................... 211 RXBnDLC (Receive Buffer n Data Length Code) ........................................... 213 RXBnDm (Receive Buffer n Data Field Byte m)............................................ 214 RXBnEIDH (Receive Buffer n Extended Identifier, High Byte)......................... 212 RXBnEIDL (Receive Buffer n Extended Identifier, Low Byte).......................... 213 RXBnSIDH (Receive Buffer n Standard Identifier, High Byte) ......................... 212 |
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