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ICS1893CFILF Datasheet(PDF) 21 Page - Integrated Circuit Systems |
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ICS1893CFILF Datasheet(HTML) 21 Page - Integrated Circuit Systems |
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21 / 126 page ![]() Chapter 5 Interface Overviews ICS1893CF, Rev. F, 03/01/07 Mar. 2007 21 ICS1893CF Data Sheet Rev. F - Release Copyright © 2007, Integrated Device Technology, Inc. All rights reserved. If a crystal is used as the clocking source, connect it to both the Ref_in (pin 47) and Ref_out (pin 46) pins of the ICS1893CF. A pair of bypass capacitors on either side of the crystal are connected to ground. The crystal is used in the parallel resonance or anti-resonance mode. The value of the load caps serve to adjust the final frequency of the crystal oscillation. Typical applications would use 33pF load caps. The exact value will be affected by the board routing capacitance on Ref_in and Ref_out pins. Smaller load capacitors raise the frequency of oscillation. Once the exact value of load capacitance is established it will be the same for all boards using the same specification crystal. The best way to measure the crystal frequency is to measure the frequency of TXCLK (pin 37) using a frequency counter with a 1 second gate time. Using the buffered output TXCLK prevents the crystal frequency from being affected by the measurement. The crystal specification is shown in Table 5.1. Table 5-1. 25MHz Crystal Specification Specifications Symbol Minimum Typical Maximum Unit Fundamental Frequency (tolerance is sum of freq., temp., stability and aging.) F0 24.99875 25.00000 25.00125 MHz Freq. Tolerance ∆F/f ± 50 ppm Input Capacitance Cin 3 pF Table 5-2. 25MHz Oscillator Specification Specifications Symbol Minimum Typical Maximum Unit Output Frequency F0 24.99875 25.00000 25.00125 MHz Freq. Stability (including aging) ∆F/f ± 50 ppm Duty cycle CMOS level one-half VDD Tw/T 35 65 % VIH 2.79 Volts VIL 0.33 Volts Period Jitter Tjitter 500 pS Input Capacitance CIN 3 pF |
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