AS7C31025C datasheet(1/9 Pages) ALSC

Part #	AS7C31025C

Description	3.3V 128K X 8 CMOS SRAM (Center power and ground)

PDF	9 Pages

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Manufacturer	ALSC [Alliance Semiconductor Corporation]

Direct Link	https://www.alliancememory.com

Logo

1 / 9 page

September 2006

Advance Information

AS7C31025C

3.3V 128K X 8 CMOS SRAM (Center power and ground)

9/20/06, v. 1.0

Alliance Memory

P. 1 of 9

®

Features

• Industrial and commercial temperatures

• Organization: 131,072 x 8 bits

• High speed

- 10 ns address access time

- 5 ns output enable access time

• Low power consumption via ship deselect

• Easy memory expansion with CE, OE inputs

• Center power and ground

• TTL/LVTTL-compatible, three-state I/O

• JEDEC-standard packages

- 32-pin, 300 mil SOJ

- 32-pin, 400 mil SOJ

- 32-pin, TSOP 2

• ESD protection

≥ 2000 volts

Logic block diagram

131,072 x 8

Array

(1,048,576)

Input buffer

I/O0

I/O7

OE

CE

WE

Address decoder

Control

circuit

A0

A1

A2

A3

A4

A5

A6

A7

VCC

GND

A8

Pin arrangement

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

32

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

A16

A15

A14

A13

OE

I/O7

I/O6

GND

VCC

I/O5

I/O4

A12

A11

A10

A9

A8

A0

A1

A2

A3

CE

I/O0

I/O1

VCC

GND

I/O2

I/O3

WE

A4

A5

A6

A7

32-pin SOJ (300 mil)

32-pin SOJ (400 mil)

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

32

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

A0

A1

A2

A3

CE

I/O0

I/O1

VCC

GND

I/O2

I/O3

WE

A16

A15

A14

A13

OE

I/O7

I/O6

GND

VCC

I/O5

I/O4

A9

A8

A4

A5

A6

A7

A12

A11

A10

32-pin TSOP 2

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AS7C31025C Datasheet(PDF) 1 Page - Alliance Semiconductor Corporation

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