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HV6008 Datasheet(PDF) 2 Page - Supertex, Inc

Part # HV6008
Description  32-Channel 짹40V Liquid Crystal Display Row Driver
PDF  7 Pages
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Manufacturer  SUTEX [Supertex, Inc]
Direct Link  http://www.supertex.com
Logo SUTEX - Supertex, Inc

HV6008 Datasheet(HTML) 2 Page - Supertex, Inc

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HV6008
Symbol
Parameter
Min
Typ
Max
Units
Conditions
V
DD1
V
I = 4V, VDD1 = -6V
V
DD2
V
I = 4V, VDD2 = +6V
V
IH
Logic input high
+2
V
DD2
VV
DD1 = -4.5V,
V
IL
Logic input low
V
DD1
-2
V
V
DD2 = +4.5V
V
OH
Logic output high
+2
V
V
OL
Logic output low
-2
V
I
IH
High-level logic input current
+3
µAVI = VDD, VDD1,2 = max
I
IL
Low-level logic input current
-50
µAVI = 0V, VDD1,2 = max
I
PP
High voltage supply current
+1
mA
Static, no load
I
NN
High voltage supply current
-1
mA
Static, no load
V
OH
Output voltage high
+39
V
V
CL
Output voltage clamp
-20
+20
mV
No load
V
OL
Output voltage low
-39
V
Z
OH
Output switch impedence high
1000
Z
CL
Output switch impedance clamp
500
Z
OL
Output switch impedance low
700
I
O
DC output current
Output H or L
5
mA
1 output only
Data out H or L
150
µA
Electrical Characteristics (over recommended operating conditions unless noted)
DC Characteristics
IDD1,2
VDD supply current
500
µA
AC Characteristics
Symbol
Parameter
Min
Typ
Max
Units
Conditions
tWH
Width of high data pulse
500
ns
tWL
Width of low data pulse
500
ns
tSU
Data set-up time before clock falls
25
ns
tH
Data hold time after clock falls
10
ns
Phase shift duty cycle
50
%
Recommended Operating Conditions
V
PP, VNN = ±40
V
PP, VNN = ±40
IO = ±15mA
VDD1 = -4.5V
V
DD2 = +4.5V
IOH = -15µA
IOL = 250µA
Symbol
Parameter
Min
Typ
Max
Units
VDD1
Logic supply voltage
-4
-6
V
VDD2
Logic supply voltage
+4
+6
V
VPP
High voltage supply
+10
+40
V
VNN
High voltage supply
-10
-40
V
VIH
High-level input voltage
+2V
VDD2
V
VIL
Low-level input voltage
-2V
VDD1
V
IO Pk.
Peak output current (any state)
±80
mA
TA
Operating free-air temperature
-40
+70
°C
fDIN
Input data rate
1
MHz
fPS
Phase shift rate
20
KHz
Note:
Power-up sequence should be the following:
1. Connect ground.
3.
Set all inputs (Data, CLK, Enable, etc.) to a known state.
2. Apply VDD.4.
Apply VPP and VNN.
Power-down sequence should be the reverse of the above.



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