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TAS5815PWPR Datasheet(PDF) 57 Page - Texas Instruments |
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TAS5815PWPR Datasheet(HTML) 57 Page - Texas Instruments |
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57 / 123 page  8.1.5 SIG_CH_CTRL Register (Offset = 28h) [Reset = 00h] SIG_CH_CTRL is shown in Figure 8-5 and described in Table 8-7. Return to the Summary Table. Signal chain control Figure 8-5. SIG_CH_CTRL Register 7 6 5 4 3 2 1 0 BCLK_RATIO FS_MODE R/W-0h R/W-0h Table 8-7. SIG_CH_CTRL Register Field Descriptions Bit Field Type Reset Description 7-4 BCLK_RATIO R/W 0h These bits indicate the configured BCLK ratio, the number of BCLK clocks in one audio frame. 4'b0000: Auto detection 4'b0011:32FS 4'b0101:64FS 4'b0111:128FS 4'b1001:256FS 4'b1011:512FS Others reserved. 3-0 FS_MODE R/W 0h FS Speed Mode These bits select the FS operation mode, which must be set according to the current audio sampling rate. 4’b0000 Auto detection 4’b0110 32kHz 4’b1000 44.1kHz 4’b1001 48kHz 4'b1010 88.2kHz 4’b1011 96kHz Others Reserved www.ti.com TAS5815 SLOSEA8 – DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 57 Product Folder Links: TAS5815 |
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