SC2677BEVB-2 datasheet(9/19 Pages) SEMTECH

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POWER MANAGEMENT

SC2677B

Designing for minimum trace length is not the only factor

for best design. Often, a optimum layout can be achieved

by keeping the wide trace and using proper layer stack-

ing to minimize the stray inductance.

It is important to keep the gate traces short. The IC must

be close to the power switches. It is recommended that

a 25 mil width or wider trace is used whenever possible.

A good placement can help if the controller is placed in

the middle of the two PWM channels.

Grounding requirements are always important in a Buck

converter layout, especially at high power. Power ground

(PGND) should be returned to the bottom MOSFET source

to provide the best gate current return path. Analog

ground(AGND) should be used for the analog returns

such as chip decoupling, frequency setting, reference

voltage (or Soft Starting cap), and the compensation.

This ground shape should be single-point connected to

the PGND shape near the ground side of the output ca-

pacitors. This will provide noise-free analog ground for

operation stability, and also provide the best possible

remote sensing for the feedback voltage.

In case two output rails need to be regulated, the AGND

shape should be single-point connected to the geometri-

cal center of the PGND for the two point of loads. The

single-point tie is a must to prevent the power current

Application Information (Cont.)

from flowing on the AGND shape, so that the analog cir-

cuitry in the controller has an electrically quiet reference,

and to provide the greatest noise-free operation. Keep

in mind that the AGND pin is never allowed to have big-

ger than 1V voltage difference vs the PGND pin. This is

usually achievable by using a ground plane for PGND in

PCB layout.

Using ground plane for PGND can reduce the physical

separation between the two grounds so that even the

fast current transitions in the PGND plane cannot gener-

ate voltage spikes exceeding the 1V level. This will pre-

vent unstable and erratic behavior.

The feedback divider must be close to the IC and be

returned to analog ground. Current sense traces must

be run parallel and close to each other and to analog

ground.

The IC must have a ceramic decoupling capacitor across

its supply pins, mounted as close to the device as

possible. The small ceramic noise-filtering capacitors on

the current-sense lines should also be placed as close to

the IC as possible.

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