SC1485ITSTRT datasheet(8/27 Pages) SEMTECH

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 2005 Semtech Corp.

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SC1485

POWER MANAGEMENT

+5V Bias Supplies

The SC1485 requires an external +5V bias supply in

addition to the battery. If stand-alone capability is

required, the +5V supply can be generated with an

external linear regulator such as the Semtech LP2951.

To avoid interference between outputs, each controller

has its own ground reference, VSSA, which should be

tied by a single trace to PGND at the negative terminal of

that controller’s output capacitor (see Layout Guidelines).

All external components referenced to VSSA in the

schematic should be connected to the appropriate VSSA

trace. The supply decoupling capacitor for controller 1

should be tied between VCCA1 and VSSA1. Likewise, the

supply decoupling capacitor for controller 2 should be

tied between VCCA2 and VSSA2. A 10

Ω resistor should

be used to decouple each VCCA supply from the main

VDDP supplies. PGND can then be a separate plane which

is not used for routing traces. All PGND connections are

connected directly to the ground plane with special

attention given to avoiding indirect connections which

may create ground loops. As mentioned above, VSSA1

and VSSA2 must be connected to the PGND plane at

the negative terminal of their respective output

capacitors only. The VDDP1 and VDDP2 inputs provide

power to the upper and lower gate drivers. A decoupling

capacitor for each supply is required. No series resistor

between VDDP and 5V is required. See layout guidelines

for more details.

Pseudo-fixed Frequency Constant On-Time PWM

Controller

The PWM control architecture consists of a constant on-

time, pseudo fixed frequency PWM controller (see Figure

1, SC1485 Block Diagram). The output ripple voltage

developed across the output filter capacitor’s ESR

provides the PWM ramp signal eliminating the need for a

current sense resistor. The high-side switch on-time is

determined by a one-shot whose period is directly

proportional to output voltage and inversely proportional

to input voltage. A second one-shot sets the minimum

off-time which is typically 400ns.

On-Time One-Shot (t

ON)

The on-time one-shot comparator has two inputs. One

input looks at the output voltage, while the other input

samples the input voltage and converts it to a current.

This input voltage-proportional current is used to charge

an internal on-time capacitor. The on-time is the time

required for the voltage on this capacitor to charge from

zero volts to VOUT, thereby making the on-time of the

high-side switch directly proportional to output voltage

and inversely proportional to input voltage. This

implementation results in a nearly constant switching

frequency without the need for a clock generator.

For VOUT < 3.3V:

)

(

BAT

OUT

TON









•

−

For 3.3V

≤ VOUT ≤ 5V:

)

(

BAT

OUT

TON









•

−

TON is a resistor connected from the input supply (VBAT)

to the TON pin. Due to the high impedance of this

resistor, the TON pin should always be bypassed to VSSA

using a 1nF ceramic capacitor.

Enable and Powersave

The EN/PSV pin enables the supply. When EN/PSV is

tied to VCCA the controller is enabled and power save

will also be enabled. If PSAVE is enabled, the SC1485

PSAVE comparator will look for the inductor current to

cross zero on eight consecutive switching cycles by

comparing the phase node (LX) to PGND. Once observed,

the controller will enter power save and turn off the low

side MOSFET when the current crosses zero. To improve

light-load efficiency and add hysteresis, the on-time is

increased by 50% in power save. The efficiency

improvement at light-loads more than offsets the

disadvantage of slightly higher output ripple. If the

inductor current does not cross zero on any switching

cycle, the controller will immediately exit power save. Since

the controller counts zero crossings, the converter can

sink current as long as the current does not cross zero

on eight consecutive cycles. This allows the output

voltage to recover quickly in response to negative load

steps even when psave is enabled.

When the EN/PSV pin is tri-stated, an internal pull-up

will activate the controller and power save will be dis-

abled.

If the EN/PSV pin is pulled low, the related output will be

shut down and tri-stated.

Applications Information

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