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 2004 Semtech Corp.

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POWER MANAGEMENT

SC1110

Block Diagram

Applications Information

THEORY OF OPERATION

Synchronous Buck Converter

V

mode pulse width modulated (PWM) controller. This sec-

tion has all the features required to build a high efficiency

synchronous buck converter for termination of power

application.

The output voltage of the synchronous converter is set

and controlled by the output of the error amplifier. The

external resistive divider generates reference voltage for

the error amplifier from the chipset voltage which is

usually 2.5V. The inverting input of the error amplifier

receives its voltage from the SENSE pin.

The internal oscillator uses an on-chip capacitor and

trimmed precision current sources to set the oscillation

frequency to 250kHz. The triangular output of the oscil-

lator sets the reference voltage at the inverting input of

the PWM comparator. The non-inverting input of the com-

parator receives it’s input voltage from the error ampli-

fier. When the oscillator output voltage drops below the

error amplifier output voltage, the comparator output

goes high. This pulls DL low, turning off the low-side FET,

and DH is pulled high, turning on the high-side FET (once

the cross-current control allows it). When the oscillator

voltage rises back above the error amplifier output volt-

age, the comparator output goes low. This pulls DH low,

turning off the high-side FET, and DL is pulled high, turn-

ing on the low-side FET (once the cross-current control

allows it).

As SENSE increases, the output voltage of the error

amplifier decreases. This causes a reduction in the on-

time of the high-side MOSFET connected to DH, hence

lowering the output voltage.

Under Voltage Lockout

The under voltage lockout circuit of the SC1110 assures

that both the high-side MOSFET driver outputs remain in

the off state whenever the supply voltage drops below

set parameters. Lockout occurs if V

Normal operation resumes once V