SC416MLTRT datasheet(17/34 Pages) SEMTECH

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SC416

high, both outputs start switching. SS1 is connected to

a capacitor and therefore VOUT1 will follow the normal

(independent) startup and shutdown operation.

SS2 does not have the typical capacitor connection; in-

stead SS2 connects to VOUT1 through resistor divider

R3/R4, which forces the SS2 voltage to be proportional to

VOUT1. As VOUT1 rises during startup, SS2 also rises, and

the FB2 comparator will force VOUT2 to track SS2 until

SS2 reaches 750mV.

Note that FB2 sets the output voltage for VOUT2 through

R1/R2. By setting the same ratio for R3/R4 as R1/R2,

VOUT2 is forced to track VOUT1. This tracking continues

until FB2 reaches 750mV, at which point VOUT2 ignores

the SS2 ramp and switches over to the internal 750mV

reference. SS2 will continue to rise above 750mV since

it is connected to VOUT2 which continues to rise to its

nominal value.

Note that during this time the SS2 pin will source 5uA,

as if it were charging a capacitor. This current will flow

through into R3/R4 and create an offset voltage at SS2.

The full equation for SS2 voltage is:

VSS2 = VOUT1 × (R4 / (R3 + R4) + 5μA × (R3||R4)

The term for the SS2 offset is (5μA × R3||R4). When track-

ing VOUT1 during startup, SS2 will be slightly higher than

the ideal value due to this offset term. This offset at SS2

is tracked by FB2. Because of the FB2 resistor divider, this

causes a consequently higher offset at VOUT2. The net

effect is that VOUT2 will be slightly higher than VOUT1

during startup tracking. The net offset is given by the

following equation, where R5/R6 are the top and bottom

resistor values used for the FB2 resistor divider:

VOUT1 – VOUT2 = 5μA × (R3||R4) × (1 + R5/R6)

Applications Information (continued)

Since the ratio of R5/R6 is dictated by the output voltage,

the way to minimize the offset is to reduce R3 and R4. It

is recommended to set the R3/R4 parallel combination to

1kΩ max, which limits the SS2 offset to 5mV.

For shutdown, both EN pins are pulled low to start the

shutdown sequence. The higher output falls first (VOUT1

in this case) as described in the independent case. The

SS2 pin also falls as VOUT1 falls. When SS2 has reached

750mV, the ramp-down of VOUT2 begins. The FB2 com-

parator switches over to the SS2 pin and tracks SS2 as it

ramps down. SS2’s ramp-down is in turn controlled by

the ramp-down of VOUT1.

Note that during the initial time when both EN pins

pulled low, the internal 4kΩ pulldown on SS2 is ener-

gized, along with the 5uA current sink. The connecting of

the 4k pulldown affects the SS2 voltage, causing it to be

significantly lower than predicted by the R3/R4 divider. If

the SS2 voltage suddenly shoots below 750mV, this will

cause the FB2 comparator to ignore the internal 750mV

reference and switch over to the SS2 voltage. Also, the

4k resistor is released, which causes the SS2 voltage to

go back above 750mV, since SS2 will now track VOUT1

through R3/R4. This can create an unwanted overshoot

on VOUT2. This is easily prevented by placing a 10nF ca-

pacitor across R4, to prevent sudden changing of the SS2

voltage.

Modified Coincident Tracking (VOUT Proportional

Tracking)

A modification of coincident tracking is to set R3/R4 (SS2

resistor divider) to a ratio other than R1/R2 (FB1 resistor

divider). VOUT2 will still track SS2 during startup and

shutdown, but VOUT2 can be made to ramp either quick-

er or slower than VOUT1, based on the R3/R4 ratio, see

Figure 11.

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