Pin Assignment

Pin Description

Pin Name

I/O

Description

VDD

O

High voltage power supply pin.

VSS

¾ Ground pin.

DIM

I

Illumination level control pins.

Internally connected to pull-down resistors.

CONT1

I

CONT2

I

Illumination level control pins.

Internally connected to pull-up resistors.

A/C

I

When the A/C pin is low, the internal circuits are reset.

The reset pulse width should be more than 2

ms.

Internally connected to a pull-up resistor.

ZA

I

Zero adjustment pin.

Internally connected to a pull-down resistor.

HS

I

Hour adjustment pin.

Internally connected to a pull-down resistor.

MS

I

Minute adjustment pin.

Internally connected to a pull-down resistor.

SE

I

Set enable pin.

Internally connected to a pull-up resistor.

OSCO

O

Crystal oscillator pin

OSCI

I

TEST1, TEST2

I

IC test pin - should be left open or kept at a low level

TEST3, TEST4

I

IC test pin - should be left open or kept at a high level

64Hz

O

64Hz signal output pin for oscillation frequency adjustment

a1, a3 ~ b2, b4, c4

O

Segment output pins for VFD

a4, d4, e4, g4

1Hz

HT16565

Rev. 1.00

2

February 7, 2007

H T 1 6 5 6 5

4 4 Q F P - A

1

2

3

4

5

6

7

8

9

1 0

1 1

1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2

2 3

2 4

2 5

2 6

2 7

2 8

2 9

3 0

3 1

3 2

3 3

3 4

3 5

3 6

3 7

3 8

3 9

4 0

4 1

4 2

4 3

4 4

g 3

e 3

d 3

c 3

g 2

e 2

c 2

g 1

e 1

d 1

c 1

b 4

f 3

a 3

b 3

1 H z

f 2

a 2 , d 2

b 2

f 1

a 1

b 1

H T 1 6 5 6 5 B

4 4 Q F P - B

1

2

3

4

5

6

7

8

9

1 0

1 1

1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2

2 3

2 4

2 5

2 6

2 7

2 8

2 9

3 0

3 1

3 2

3 3

3 4

3 5

3 6

3 7

3 8

3 9

4 0

4 1

4 2

4 3

4 4

c 4

e 4 , g 4

Z A

T E S T 1

T E S T 4

N C

T E S T 3

T E S T 2

M S

H S

a 4 , d 4

6 4 H z

D I M

S E

V D D

C O N T 1

N C

C O N T 2

V S S

O S C I

O S C O

A / C